Table of Contents
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8.6
Breakpoints .................................................................................................... 8-14
9.1
Introduction ...................................................................................................... 9-1
9.2
Fuzzy Logic Basics .......................................................................................... 9-1
9.3
Example Inference Kernel................................................................................ 9-7
9.4
MEM Instruction Details ................................................................................... 9-9
9.5
REV, REVW Instruction Details ..................................................................... 9-13
9.6
WAV Instruction Details ................................................................................. 9-22
9.7
Custom Fuzzy Logic Programming ................................................................ 9-26
10.1
Expansion System Description ...................................................................... 10-1
10.2
CALL and Return from Call Instructions......................................................... 10-3
10.3
Address Lines for Expansion Memory ........................................................... 10-4
10.4
Overlay Window Controls............................................................................... 10-4
10.5
Using Chip-Select Circuits ............................................................................. 10-5
10.6
System Notes................................................................................................. 10-7
A.1
Instruction Set Summary..................................................................................A-1
A.2
Opcode Map.....................................................................................................A-1
A.3
Indexed Addressing Postbyte Encoding ..........................................................A-1
A.4
Transfer and Exchange Postbyte Encoding.....................................................A-1
A.5
Loop Primitive Postbyte Encoding ...................................................................A-1
B.1
CPU12 Design Goals .......................................................................................B-1
B.2
Source Code Compatibility...............................................................................B-1
B.3
Programmer's Model and Stacking ..................................................................B-3
B.4
True 16-Bit Architecture ...................................................................................B-3
B.5
Improved Indexing............................................................................................B-6
B.6
Improved Performance.....................................................................................B-9
B.7
Additional Functions.......................................................................................B-11
C.1
Data Types...................................................................................................... C-1
C.2
Parameters and Variables............................................................................... C-1
C.3
Increment and Decrement Operators.............................................................. C-3
CPU12
REFERENCE MANUAL
TABLE OF CONTENTS
SECTION 9
FUZZY LOGIC SUPPORT
SECTION 10
MEMORY EXPANSION
APPENDIX A
INSTRUCTION REFERENCE
APPENDIX B
M68HC11 TO M68HC12 UPGRADE PATH
APPENDIX C
HIGH-LEVEL LANGUAGE SUPPORT
Page
MOTOROLA
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