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SEV
1 ⇒ V bit
Operation:
Description:
Sets the V status bit. This instruction is assembled as ORCC #$02. The
ORCC instruction can be used to set any combination of bits in the CCR
in one operation.
Condition Codes and Boolean Formulas:
S
–
V:
Addressing Modes, Machine Code, and Execution Times:
Source Form
SEV translates to...
ORCC #$02
MOTOROLA
6-184
Set Two's Complement Overflow Bit
X
H
I
N
Z
–
–
–
–
–
1; Set.
Address Mode
IMM
INSTRUCTION GLOSSARY
V
C
1
–
Object Code
14 02
SEV
Cycles
Access Detail
1
P
CPU12
REFERENCE MANUAL
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