7.05
SUPERVISOR CIRCUIT
7.05.1 FIELD PROGRAMMABLE GATE ARRAY
Component #2 on Diagram 7-1 is defined as Field Programmable Gate Array (FPGA);
this memory device contains registers, one of which is described below.
TEKNOR computers utilize address space 190H, 290H or 390H (depending on the setting
of W16 jumper for I/O base address) to enable special features (see Table 7-3 below).
TABLE 7-3: Register 190H, 290H or 390H
Bit #
Bit Value
Function:
(Default)
WRITE
0
0
Enable Watchdog
1=enable, R/W bit
1
1
Watchdog activate
1-0-1 to toggle, R/W bit
2
0
Flash VPP enable
3
0
Enable direction control RS-485
1=enable RS-485 only, write only
4
0
Reserved, ENWF
5
0
Reserved, ENWB
6
1
Reserved, B64/16
7
0
Reserved
F Not all bits are R/W. Therefore, be certain to keep a mirror image of the register
when programming it.
F All bits are 0 after a hardware RESET or power up condition.
F Write the values shown in the "Bit Value (Default)" column if you are unsure.
Installing and Working With System Components
READ
Same
Same
Same
Power Detection Output or
Battery Low output
W19 (7-8) Status
W19 (5-6) Status
W19 (3-4) Status
W19 (1-2) Status
7-8