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ASYNCLISTADDR –RW - 32 bits - [EOR_Reg : EHCI_EOR + 18h]
Field Name
Bits
Reserved
4:0
Link Pointer Low
31:5
(LPL)
CONFIGFLAG –RW - 32 bits - [EOR_Reg : EHCI_EOR + 40h]
Field Name
Bits
Configure Flag
0
(CF)
Reserved
31:1
PORTSC (1-N_PORTS) –RW - 32 bits - [EOR_Reg : EHCI_EOR + (44h~68h)]
Field Name
Bits
Current Connect
0
Status
Connect Status
1
Change
Port
2
Enabled/Disabled
Port
3
Enable/Disable
Change
Over-current
4
Active
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
Default
These bits are reserved and their value has no effect on operation.
00h
These bits correspond to memory address signals [31:5], respectively.
This field may only reference a Queue Head (QH).
Default
0b
Host software sets this bit as the last action in its process of configuring
the Host Controller. This bit controls the default port-routing control
logic. Bit values and side-effects are listed below:
0b = Port routing control logic default-routes each port to an
implementation dependent classic host controller.
1b = Port routing control logic default-routes all ports to this host
controller.
These bits are reserved and should be set to zero.
Default
0b
1 = Device is present on port.
0 = No device is present.
This value reflects the current state of the port, and may not correspond
directly to the event that caused the Connect Status Change bit (Bit 1) to
be set. This field is zero if Port Power is zero. [Read-only]
0b
1 = Change in Current Connect Status.
0 = No change.
Indicates a change has occurred in the port's Current Connect Status.
The host controller sets this bit for all changes to the port device connect
status, even if system software has not cleared an existing connect status
change. For example, the insertion status changes twice before system
software has cleared the changed condition, hub hardware will be
"setting" an already-set bit (i.e., the bit will remain set). Software sets this
bit to 0 by writing a 1 to it. This field is zero if Port Power is zero.
0b
1 = Enable.
0 = Disable
Ports can only be enabled by the host controller as a part of the reset and
enable. Software cannot enable a port by writing a one to this field. The
host controller will only set this bit to a one when the reset sequence
determines that the attached device is a high-speed device. Ports can be
disabled by either a fault condition (disconnect event or other fault
condition) or by host software. Note that the bit status does not change
until the port state actually changes. There may be a delay in disabling or
enabling a port due to other host controller and bus events. When the port
is disabled (0b) downstream propagation of data is blocked on this port,
except for reset. This field is zero if Port Power is zero.
0b
1 = Port enabled/disabled status has changed.
0 = No change.
For the root hub, this bit gets set to a one only when a port is disabled due
to the appropriate conditions existing at the EOF2. Software clears this bit
by writing a 1 to it. This field is zero if Port Power is zero.
0b
1 = This port currently has an over-current condition.
0 = This port does not have an over-current condition.
This bit will automatically transition from a one to a zero when the over
current condition is removed.
Description
Description
Description
OCHI USB 1.1 and EHCI USB 2.0 Controllers
Proprietary
Page 87
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