AMD SB600 Technical Reference Manual page 124

Field Name
Reserved
Field Name
InterruptEnable
Kill
SMBusProtocol
Reserved
Start
Reserved
Field Name
SMBusHostCmd
Field Name
SMBusRdWr
SMBusAddr
Field Name
SMBusData0
Field Name
SMBusData1
Field Name
SMBusBlockData
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
SMBusSlaveStatus - RW - 8 bits - [SMBUS:01h]
Bits Default
7:6 00b
SMBusControl - RW - 8 bits - [SMBUS:02h]
Bits Default
0 0b Enable the generation of interrupts on the completion of current
host transaction.
1 0b Stop the current host transaction in process
4:2 000b 000 – Quick Read or Write
001 – Byte Read or Write
010 – Byte Data Read or Write
011 – Word Data Read or Write
100 – Reserved
101 – Block Read or Write
110 – Reserved
111 – Reserved
5 0b
6 0b Writing an 1 in this field initiates SMBus controller host interface
to execute the command programmed in the SMBusProtocol
field
7 0b
SMBusHostCmd - RW – 8 bits - [SMBUS:03h]
Bits Default
7:0 00h This field contains the data transmitted in the command field of
SMBus host transaction
SMBusAddress - RW - 8 bits - [SMBUS:04h]
Bits Default
0 0b 1 – Execute a Read command
0 – Execute a Write command
7:1 00h This field contains the 7-bit address of the target slave device.
SMBusData0 - RW - 8 bits - [SMBUS:05h]
Bits Default
7:0 00h This register should be programmed with a value to be
transmitted in the data 0 field of an SMBus host interface
transaction. For Block Write commands, the count of the
memory should be stored in this field. The value of this
register is loaded into the block transfer count field. This valid
value for block command count is between 1 and 32. For
block reads, count received from SMBus device is stored here.
SMBusData1 - RW - 8 bits - [SMBUS:06h]
Bits Default
7:0 00h This register should be programmed with a value to be
transmitted in the data 1 field of an SMBus host interface
transaction.
SMBusBlockData - RW - 8 bits - [SMBUS:07h]
Bits Default
7:0 00h This register is used to transfer data into or out of the block
data storage array.
Description
Description
Description
Description
Description
Description
Description
SMBus Module and ACPI Block (Device 20, Function 0)
Proprietary Page 124