AMD SB600 Technical Reference Manual page 179

Field Name
AzaliaStatus
GPM6Status
GPM7Status
A11: Gpio2Status
A12:
Gpio2Status/Gpio66Status
SataSciStatus
This register is located at the base address defined by AcpiGpe0Blk.
Field Name
GeventEnable
LeventEnable
TwarnEnable
Reserved
USBEnable
AC97Enable
OtherThermEnable
GPM9Enable
PCIeHotPlugEnable
ExtEvent0Enable
ExtEvent1Enable
PCIePmeEnable
GPM0Enable
GPM1Enable
GPM2Enable
GPM3Enable
GPM8Enable
Gpio0Enable
GPM4Enable
GPM5Enable
AzaliaEnable
GPM6Enable
GPM7Enable
Gpio2Enable
SataSciEnable
This register is located at the base address defined by AcpiGpe0Blk.
Field Name
SmiCmdPort
This register is located at the base address defined by AcpiSmiCmd + offset 0.
Field Name
SmiCmdStatus
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
EVENT_STATUS - RW - 32 bits - [AcpiGpe0Blk:00h]
Bits Default
27 0b
28 0b
29 0b
30 0b
31 0b
EVENT_ENABLE - RW - 32 bits - [AcpiGpe0Blk:04h]
Bits Default
7:0 00h
8 0b
9 0b
10 0b
11 0b
12 0b
13 0b
14 0b
15 0b
16 0b
17 0b
18 0b
19 0b
20 0b
21 0b
22 0b
23 0b
24 0b
25 0b
26 0b
27 0b
28 0b
29 0b
30 0b
31 0b
SmiCmdPort - RW - 8 bits – [SmiCmdBlk: 00h]
Bits Default
7:0 00h
SmiCmdStatus - RW - 8 bits – [SmiCmdBlk: 01h]
Bits Default
7:0 00h
Description
This bit indicates the status from the internal HD Audio
controller
This bit indicates the status of GPM[6] to SCI/Wakeup
This bit indicates the status of GPM[7] to SCI/Wakeup
A11: This bit indicates the status of GPIO2 to SCI/wakeup
A12: This bit indicates the status of GPIO2 or GPIO66;
depending on PMIO_10h[7]. If PMIO_10h[7]=0, then it is
routed to GPIO2. If PMIO_10h[7]=1, then it is GPIO66
This bit indicates the status of SataSci to SCI/wakeup
Description
These bits enable the GeventStatus to SCI output.
This bit enables LEventStatus to SCI generation.
This bit enables TwarnStatus to SCI generation.
This bit enables PME# from the internal USB controllers
This bit enables PME# from the internal ac97 controllers
Enables bit for AcpiGpe0Blk, offset 00, bit 13
OtherThermStatus
Enables bit for AcpiGpe0Blk, offset 00, bit 14 GPM9Status
Enable bit for AcpiGpe0Blk, offset 00, bit 15
PCIeHotPlugStatus
Enables bit for AcpiGpe0Blk, offset 00, bit 16
ExtEvent0Status
Enables bit for AcpiGpe0Blk, offset 00, bit 17
ExtEvent1Status
Enables bit for AcpiGpe0Blk, offset 00, bit 18 PCIePmeStatus
Enables bit for AcpiGpe0Blk, offset 00, bit 19 GPM0Status
Enables bit for AcpiGpe0Blk, offset 00, bit 20 GPM1Status
Enables bit for AcpiGpe0Blk, offset 00, bit 21 GPM2Status
Enables bit for AcpiGpe0Blk, offset 00, bit 22 GPM3Status
Enables bit for AcpiGpe0Blk, offset 00, bit 23 GPM8Status
Enables bit for AcpiGpe0Blk, offset 00, bit 24 Gpio0Status
Enables bit for AcpiGpe0Blk, offset 00, bit 25 GPM4Status
Enables bit for AcpiGpe0Blk, offset 00, bit 26 GPM5Status
Enables bit for AcpiGpe0Blk, offset 00, bit 27; for the internal
HD Audio PME
Enables bit for AcpiGpe0Blk, offset 00, bit 28 GPM6Status
Enables bit for AcpiGpe0Blk, offset 00, bit 29 GPM7Status
Enables bit for AcpiGpe0Blk, offset 00, bit 30 Gpio2Status
Enables bit for AcpiGpe0Blk, offset 00, bit 31 SataSciStatus
Description
Used by BIOS and OS
Description
Used by BIOS and OS
SMBus Module and ACPI Block (Device 20, Function 0)
Proprietary Page 179