AMD SB600 Technical Reference Manual page 244

Register reference manual
Hide thumbs Also See for SB600:
Table of Contents

Advertisement

Field Name
Stripe Control
Traffic Priority
Bidirectional Direction
Control
Stream Number
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
Stream Descriptor Control – RW – 24 bits
Input Stream 0 - [Mem_Reg: Base + 80h]
Input Stream 1 - [Mem_Reg: Base + A0h]
Input Stream 2 - [Mem_Reg: Base + C0h]
Input Stream 3 - [Mem_Reg: Base + E0h]
Output Stream 0 - [Mem_Reg: Base + 100h]
Output Stream 1 - [Mem_Reg: Base + 120h]
Output Stream 2 - [Mem_Reg: Base + 140h]
Output Stream 3 - [Mem_Reg: Base + 160h]
Bits
Default
17:16
0h
The hardware only supports one SDO, this field has no
functional impact.
18
0b
If set to "1", it will cause the controller to generate non-
snooped traffic.
19
0b
The hardware does not support bi-direction, this field has
no impact.
23:20
0h
The value reflects the Tag associated with the data being
transferred on the link.
When data controlled by this descriptor is sent out over the
link, it will have this stream number encoded on the SYNC
signal.
When an input stream is detected on any of the SDIN_x
signals that match this value, the data are loaded into the
FIFO associated with this descriptor.
0000b = Reserved
0001b = Stream 1
:
1111b = Stream 15
Description
HD Audio Controllers Registers
Proprietary
Page 244

Advertisement

Table of Contents
loading

Table of Contents