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Pin Name
Multi-Function
(*Note 1)
Selection
GPM3/
SMBus
USB_OC3#
Reg64h[Bit 23]
=1 to Enable
GPE
GPM4/
SMBus
USB_OC4#
Reg64h[Bit 19]
=1 to enable
GPE
GPM5/
SMBus
USB_OC5#
Reg64h[Bit 19]
=1 to enable
GPE
GPM6/
PM IO
BLINK
Reg7Ch[Bit 3:2]
00: GPM6
01/10/11: BLINK
1/4Hz, 1/2Hz,
and always-on
SMBus
Reg64h[Bit 18]
=1 to enable
GPE
GPM7/
PM IO
SYS_
Reg55h[Bit 2]
RESET#
0: GPM7
1: SYS_RESET#
SMBus
Reg64h[Bit 17]
=1 to enable
GPE
GPM8/
PM IO
USB_OC8#/
Reg8Dh[Bit 2]
AZ_DOCK_
0: GPM8
RST#
1:
AZ_DOCK_RST
#
SMBus
Reg64h[Bit 23]
=1 to enable
GPE
GPM9/
PM IO
USB_OC9#/
Reg8Dh[Bit 1]
SLP_S2
0: GPM9
1: SLP_S2
EXTEVENT
SMBus
0#/
Reg64h[Bit 22]
RI#
=1 to enable
GPE
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
Configure Bit
Trigger Configure
00 – SCI or SMI#
0–Falling edge
01 – SMI#
1–Rising edge
10 – SMI#
followed by SCI
11 - IRQ13
PM IO
PM IO
Reg33h[Bit5:4]
Reg37h[Bit 6]
PM IO
PM IO
Reg34h[Bit3:2]
Reg38h[Bit 1]
PM IO
PM IO
Reg34h[Bit5:4]
Reg38h[Bit 2]
PM IO
PM IO
Reg35h[Bit1:0]
Reg38h[Bit 4]
PM IO
PM IO
Reg35h[Bit3:2]
Reg38h[Bit 5]
PM IO
PM IO
Reg33h[Bit7:6]
Reg37h[Bit 7]
PM IO
Always falling edge ACPI
Reg3Dh[Bit3:2]
PM IO
PM IO
Reg32h[Bit1:0]
Reg37h[Bit 0]
Enable
Status
ACPI Event
(Write 1 to ACPI
GPE00h Bit to
Clear)
ACPI
PM IO
GPE04h[Bit22]
Reg3Ah[Bit 6]
or ACPI
GPE00 [Bit 22]
ACPI
PM IO
GPE04h[Bit25]
Reg3Bh[Bit 1]
or ACPI
GPE00h[Bit25]
ACPI
PM IO
GPE04h[Bit26]
Reg3Bh[Bit 2]
or ACPI
GPE00h[Bit26]
ACPI
PM IO
GPE04h[Bit28]
Reg3Bh[Bit 4]
or ACPI
GPE00h[Bit28]
ACPI
PM IO
GPE04h[Bit29]
Reg3Bh[Bit 5]
or ACPI
GPE00h[Bit29]
ACPI
PM IO
GPE04h[Bit23]
Reg3Ah[Bit 7]
or ACPI
GPE00 [Bit 23]
ACPI
GPE04h[Bit14]
GPE00 [Bit 14]
ACPI
PM IO
GPE04h[Bit16]
Reg3Ah[Bit 0]
or ACPI
GPE00h[Bit16]
GEVENT/GPE/GPM/ExtEvent
Proprietary
Power
Domain
S5
S5
S5
S5
S5
S5
S5
S5
Page 285
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