AMD SB600 Technical Reference Manual page 21

Field Name
Port0 PHY
TX main driver swing
TX pre-emphasis driver
swing
TX pre-emphasis enable
Reserved
Field Name
Port1 PHY
TX main swing
©2008 Advanced Micro Devices, Inc.
AMD SB600 Register Reference Manual
PHY Port0 Control - RW- 32 bits - [PCI_Reg:88h]
Bits Default
23:0 B40014h PHY port0 fine-tune register.
4:0 10100b Port0 Tx driving swing[4:0] is valid for SATA 1.5G. It sets the
TX main driver swing. The user can program the optimum
value for each SATA port.
Bit 4
1
1
1
1
1
1
1
1
Note: This applies to all the ASIC Revisions A11 and above.
7:5 000b Port0 Tx driving swing[7:5] is valid for both SATA 3G and
1.5G. It sets the TX pre-emphasis driver strength. The user
can program the optimum pre-emphasis value for each SATA
port if TX pre-emphasis enable bit is turned on.
Note: This applies to all the ASIC Revisions A11 and above.
13 0b Turns on TX pre-emphasis output
1: Enable pre-emphasis
0: Disable pre-emphasis
31:24 Reserved.
PHY Port1 Control - RW- 32 bits - [PCI_Reg:8Ch]
Bits Default
23:0 B40014h PHY port1 fine-tune register.
4:0 10100b Port1 Tx driving swing[4:0] is valid at SATA 1.5G. It sets the
TX main driver swing. The user can program the optimum
value for each SATA port.
Bit 4
1
1
1
1
1
1
1
1
Note: This applies to all the ASIC Revisions A11 and above.
Description
Bit 3 Bit 2 Bit 1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Bit 7 Bit 6 Bit 5
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Description
Bit 3 Bit 2 Bit 1
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
SATA Registers (Device 18, Function 0)
Proprietary
Bit0 Nominal Output
0 400mv
0 450mv
0 500mv
0 550mv
0 600mv
0 650mv
0 700mv
0 750mv
pre-emphasis amount
0mv
25mv
50mv
75mv
100mv
125mv
150mv
175mv
Bit 0 Nominal Output
0 400mv
0 450mv
0 500mv
0 550mv
0 600mv
0 650mv
0 700mv
0 750mv
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