Intel X3350 - Xeon 2.66 Ghz 12M L2 Cache 1333MHz FSB LGA775 Quad-Core Processor Design Manual page 52

Xeon processor c5500/c3500 series and lga1366 socket hermal/mechanical design guide
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Thermal Specifications
always a negative value and represents a delta below the onset of thermal control
circuit (TCC) activation, as indicated by PROCHOT#. Therefore, as the temperature
approaches TCC activation, the value approaches zero degrees.
6.3.1.2
Processor Thermal Data Sample Rate and Filtering
The processor digital thermal sensor (DTS) provides an improved capability to monitor
device hot spots, which inherently leads to more varying temperature readings over
short time intervals. To reduce the sample rate requirements on PECI and improve
thermal data stability vs. time the processor DTS implements an averaging algorithm
that filters the incoming data. This filter is expressed mathematically as:
Where: PECI(t) is the new averaged temperature, PECI(t-1) is the previous averaged
temperature Temp is the raw temperature data from the DTS, X is the Thermal
Averaging Constant (TAC).
Note:
Only values read via the PECI interface are averaged. Temperature values read via the
IA32_TEMP_STATUS MSR are not averaged.
The Thermal Averaging Constant is a BIOS configurable value that determines the time
in milliseconds over which the DTS temperature values are averaged. Short averaging
times will make the averaged temperature values respond more quickly to DTS
changes. Long averaging times will result in better overall thermal smoothing but also
incur a larger time lag between fast DST temperature changes and the value read via
PECI.
Within the processor, the DTS converts an analog signal into a digital value
representing the temperature relative to TCC activation. The conversions are in
integers with each single number change corresponding to approximately 1° C. DTS
values reported via the internal processor MSR will be in whole integers.
As a result of the averaging function described above, DTS values reported over PECI
will include a 6-bit fractional value. Under typical operating conditions, where the
temperature is close to Tcontrol, the fractional values may not be of interest. But when
the temperature approaches zero, the fractional values can be used to detect the
activation of the TCC. An averaged temperature value between 0 and 1 can only occur
if the TCC has been activated during the averaging window. As TCC activation time
increases, the fractional value will approach zero. Fan control circuits can detect this
situation and take appropriate action as determined by the system designers. Of
course, fan control chips can also monitor the Prochot pin to detect TCC activation via a
dedicated input pin on the package.
August 2010
Order Number: 323107-002US
PECI(t) = PECI(t-1)+1/(2^X)*[Temp - PECI(t-1)]
Intel
®
®
Xeon
Processor C5500/C3500 Series and LGA1366 Socket
Thermal/Mechanical Design Guide
52

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