2–2
Board Overview
Figure 2–1. Overview of the Cyclone V GT FPGA Development Board Features
Table 2–1. Board Components (Part 1 of 4)
Board Reference
Featured Devices
U13
U32
Configuration, Status, and Setup Elements
J13
SW3
Cyclone V GT FPGA Development Board
Reference Manual
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This section provides an overview of the Cyclone V GT FPGA development board,
including an annotated board image and component descriptions.
an overview of the board features.
Table 2–1
describes the components and lists their corresponding board references.
Type
FPGA
CPLD
JTAG chain header
JTAG chain control or
PCI Express DIP switch
Description
Cyclone V GT, 5CGTFD9E5F35C7N, 1152-pin FBGA.
MAX V CPLD, 5M2210ZF256C4N, 256-pin FBGA.
Provides access to the JTAG chain and disables the embedded
USB-Blaster II when using an external USB-Blaster cable.
Remove or include devices in the active JTAG chain. Also controls the
PCI Express lane width by connecting the prsnt pins together on the
PCI Express edge connector.
Chapter 2: Board Components
Board Overview
Figure 2–1
shows
August 2017 Altera Corporation