Altera Cyclone V Reference Manual page 18

Gt fpga development board
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2–10
Table 2–5. MAX V CPLD 5M2210 System Controller Device Pin-Out (Part 4 of 5)
Board
Reference (U32)
P2
E2
F5
B8
A8
M5
L6
P3
N4
P11
P12
H2
T11
E11
R10
A4
A6
M10
M9
N10
B7
D12
B14
C13
B16
B13
D5
E8
D11
E7
A5
D7
B6
A10
D4
R4
T4
Cyclone V GT FPGA Development Board
Reference Manual
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Schematic Signal Name
I/O Standard
FPGA_PR_ERROR
FPGA_PR_READY
FPGA_PR_REQUEST
HSMA_PRSNTN
HSMB_PRSNTN
JTAG_BLASTER_TDI
JTAG_EPM2210_TDI
JTAG_TCK
JTAG_TMS
M570_CLOCK
M570_PCIE_JTAG_EN
MAX_AS_CONF
MAX_CLK
MAX_CONF_DONE
MAX_CSN
MAX_ERROR
MAX_LOAD
MAX_OEN
MAX_RESETN
MAX_WEN
OVERTEMP
PGM_CONFIG
PGM_LED0
PGM_LED1
PGM_LED2
PGM_SEL
SDI_A_RX_BYPASS
SDI_A_RX_EN
SDI_A_TX_EN
SENSE_CSN
SENSE_SCK
SENSE_SDI
SENSE_SDO
SI570_EN
SI571_EN
USB_CFG0
USB_CFG1
2.5-V
FPGA partial reconfiguration error
2.5-V
FPGA partial reconfiguration ready
2.5-V
FPGA partial reconfiguration request
2.5-V
HSMC port A present
2.5-V
HSMC port B present
2.5-V
MAX V CPLD JTAG chain data out
2.5-V
MAX V CPLD JTAG chain data in
2.5-V
JTAG chain clock
2.5-V
JTAG chain mode select
25-MHz clock to embedded USB-Blaster II for sending
1.8-V
FACTORY command
Low signal to disable the embedded USB-Blaster II when PCI
1.8-V
Express is the master to the JTAG chain
2.5-V
MAX V active serial configuration
2.5-V
Clock source from the FPGA PLL
2.5-V
Embedded USB-Blaster II configuration done LED
1.8-V
FM bus MAX V chip select
2.5-V
FPGA configuration error LED
2.5-V
FPGA configuration active LED
1.8-V
FM bus MAX V output enable
1.8-V
MAX V reset push button
1.8-V
FM bus MAX V write enable
2.5-V
Temperature monitor fan enable
2.5-V
Load the flash memory image identified by the PGM LEDs
2.5-V
Flash memory PGM select indicator 0
2.5-V
Flash memory PGM select indicator 1
2.5-V
Flash memory PGM select indicator 2
2.5-V
Toggles the PGM_LED[2:0] LED sequence
2.5-V
SDI equalization bypass
2.5-V
SDI receive enable
2.5-V
SDI transmit enable
2.5-V
Power monitor chip select
2.5-V
Power monitor SPI clock
2.5-V
Power monitor SPI data in
2.5-V
Power monitor SPI data out
2.5-V
Variable voltage oscillator enable
2.5-V
SDI variable voltage oscillator enable
1.8-V
Embedded USB-Blaster II interface. Reserved for future use
1.8-V
Embedded USB-Blaster II interface. Reserved for future use
Chapter 2: Board Components
MAX V CPLD 5M2210 System Controller
Description
August 2017 Altera Corporation

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