Altera Cyclone V Reference Manual page 15

Chapter 2: Board Components
MAX V CPLD 5M2210 System Controller
Table 2–5. MAX V CPLD 5M2210 System Controller Device Pin-Out (Part 1 of 5)
Board
Reference (U32)
L2
R12
B9
E9
J5
A15
A13
J12
C9
D9
D10
M1
T13
T15
R14
N12
A2
August 2017 Altera Corporation
Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com.
Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from
Figure 2–2 illustrates the MAX V CPLD 5M2210 System Controller's functionality and
external circuit connections as a block diagram.
Figure 2–2. MAX V CPLD 5M2210 System Controller Block Diagram
PC
Embedded
USB-Blaster II
Encoder
Power
LTC2418
Measurement
Controller
Results
Table 2–5 lists the I/O signals present on the MAX V CPLD 5M2210 System
Controller. The signal names and functions are relative to the MAX V device.
Schematic Signal Name I/O Standard
ASSP_CPLD_MRN
ASSP_MODE
CLK125_EN
CLK50_EN
CLK_CONFIG
CLK_ENABLE
CLK_SEL
CLKIN_MAX_50
CLOCK_SCL
CLOCK_SDA
CPU_RESETN
EXTRA_SIG0
EXTRA_SIG1
EXTRA_SIG2
FACTORY_REQUEST
FACTORY_STATUS
FACTORY_USER
MAX V CPLD System Controller
JTAG Control
SLD-HUB
Decoder
Virtual-JTAG
2.5-V For ASSP design (optional)
2.5-V For ASSP design (optional)
2.5-V 125 MHz oscillator enable
2.5-V 50 MHz oscillator enable
2.5-V 100 MHz configuration clock input
2.5-V DIP switch for clock oscillator enable
2.5-V DIP switch for clock select—SMA or oscillator
2.5-V 50 MHz clock input
2.5-V Programmable oscillator I
2.5-V Programmable oscillator I
2.5-V FPGA reset push button
2.5-V Embedded USB-Blaster II interface. Reserved for future use
1.8-V Embedded USB-Blaster II interface. Reserved for future use
1.8-V Embedded USB-Blaster II interface. Reserved for future use
Embedded USB-Blaster II request to send FACTORY
1.8-V
command
1.8-V Embedded USB-Blaster II FACTORY command status
1.8-V DIP switch to load factory or user design at power-up
FSM Bus
FPGA
Information
Register
Flash
SSRAM
Control
Register
PFL
GPIO
Si571
Si571
Programmable
Controller
Oscillator
Si570
Si570
Programmable
Controller
Oscillator
Description
2
C clock
2
C data
Cyclone V GT FPGA Development Board
Reference Manual
2–7