Revision History; Table 58. Document Revision History - ST STM32H7 Series Programming Manual

Revision history

5 Revision history
Date
20-Feb-2012
09-Jul-2012
04-Sep-2012
12-May-2014
18-Apr-2016
02-Oct-2017
21-Feb-2019
260/262

Table 58. Document revision history

Revision
1 Initial release.
Changed reset value in
register (FPCCR).
2
Added Table 1: Applicable
Added information on the STM32F3xxx Cortex-M4 processor.
Added extra part numbers to
Added related documentation references to Introduction.
Changed "IEEE754-compliant single-precision FPU" bullet in
Section 1.3.3: Cortex-M4 processor features and benefits
Added information on extended interrupt/event controller to
Section 2.5.3: External event input / extended interrupt and event
3
input.
Changed first "interrupt" bullet in
interrupt controller
Removed outdated reset value information in
Configuration and control register
Table 52: System fault handler priority
Added a note about IEEE 754 to
(FPU).
Updated Reference
Updated Section 4.4.1: Auxiliary control register
4
Updated Section 4.5.1: SysTick control and status register
(STK_CTRL).
Updated:
– Introduction
– Reference documents
– Section 2.5.3: External event input / extended interrupt and event
input
5
– Section 4.6.7: Enabling and clearing FPU exception interrupts
– Table 51: Priority grouping
Removed:
– Table 1: Applicable products
Updated document scope to include STM32L4+ Series impacting
only the document's title and cover page.
6
Updated Table 49: NVIC register map and reset values
Updated:
– Document scope to include STM32MP1 Series, STM32WB Series,
STM32G4 Series
7 – Title and cover page
– Section 1: About this document
– General update of
(NVIC)
PM0214 Rev 9
Changes
Section 4.6.2: Floating-point context control
products.
Table 1: Applicable
Section 4.3: Nested vectored
(NVIC).
(CCR), and for 0x14 offset in
fields.
Section 4.6: Floating point unit
documents.
Section 4.3: Nested vectored interrupt controller
PM0214
products.
summary.
Section 4.4.7:
(ACTLR).