Miscellaneous Instructions; Table 36. Miscellaneous Instructions - ST STM32H7 Series Programming Manual

The STM32 Cortex-M4 instruction set
3.11

Miscellaneous instructions

Table 36
Mnemonic
BKPT
CPSID
CPSIE
DMB
DSB
ISB
MRS
MSR
NOP
SEV
SVC
WFE
WFI
180/262
shows the remaining Cortex-M4 instructions:

Table 36. Miscellaneous instructions

Breakpoint
Change Processor State, Disable Interrupts
Change Processor State, Enable Interrupts
Data Memory Barrier
Data Synchronization Barrier
Instruction Synchronization Barrier
Move from special register to register
Move from register to special register
No Operation
Send Event
Supervisor Call
Wait For Event
Wait For Interrupt
Brief description
PM0214 Rev 9
PM0214
See
BKPT on page 181
CPS on page 182
CPS on page 182
DMB on page 183
DSB on page 184
ISB on page 185
MRS on page 186
MSR on page 187
NOP on page 188
SEV on page 189
SVC on page 190
WFE on page 191
WFI on page 192