ST STM32H7 Series Programming Manual page 57

PM0214
Mnemonic
VCMP.F32
VCMPE.F32 Sd, <Sm | #0.0>
VCVT.S32.F
32
VCVT.S16.F
32
VCVTR.S32.
F32
VCVT<B|H>.
F32.F16
VCVTT<B|T
>.F32.F16
VDIV.F32
VFMA.F32
VFNMA.F32 {Sd,} Sn, Sm
VFMS.F32
VFNMS.F32 {Sd,} Sn, Sm
VLDM.F<32|
64>
VLDR.F<32|
64>
VLMA.F32
VLMS.F32
VMOV.F32
VMOV
VMOV
VMOV
Table 21. Cortex-M4 instructions (continued)
Operands
Compare two floating-point
Sd, <Sm | #0.0> registers, or one floating-point
register and zero
Compare two floating-point
registers, or one floating-point
register and zero with Invalid
Operation check
Convert between floating-point
Sd, Sm
and integer
Convert between floating-point
Sd, Sd, #fbits
and fixed point
Convert between floating-point
Sd, Sm
and integer with rounding
Converts half-precision value
Sd, Sm
to single-precision
Converts single-precision
Sd, Sm
register to half-precision
{Sd,} Sn, Sm Floating-point divide
Floating-point fused multiply
{Sd,} Sn, Sm
accumulate
Floating-point fused negate
multiply accumulate
Floating-point fused multiply
{Sd,} Sn, Sm
subtract
Floating-point fused negate
multiply subtract
Load multiple extension
Rn{!}, list
registers
Load an extension register
<
Dd|Sd>, [Rn]
from memory
Floating-point multiply
{Sd,} Sn, Sm
accumulate
{Sd,} Sn, Sm Floating-point multiply subtract —
Floating-point move
Sd, #imm
immediate
Sd, Sm Floating-point move register
Copy Arm core register to
Sn, Rt
single precision
Copy 2 Arm core registers to 2
Sm, Sm1, Rt, Rt2
single precision
PM0214 Rev 9
The STM32 Cortex-M4 instruction set
Brief description Flags Page
FPSCR 3.10.3 on page 153
FPSCR 3.10.3 on page 153
— 3.10.4 on page 154
— 3.10.4 on page 154
— 3.10.4 on page 154
— 3.10.5 on page 155
— 3.10.6 on page 156
— 3.10.7 on page 157
— 3.10.8 on page 158
— 3.10.9 on page 159
— 3.10.8 on page 158
— 3.10.9 on page 159
3.10.10 on page
—
160
3.10.11 on page
—
161
3.10.12 on page
—
162
3.10.12 on page
162
3.10.13 on page
—
163
3.10.14 on page
—
164
3.10.18 on page
—
168
3.10.17 on page
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