And, Orr, Eor, Bic, And Orn - ST STM32H7 Series Programming Manual

PM0214
Multiword values do not have to use consecutive registers.
subtraction
from another contained in R6, R2, and R8. The example stores the result in R6, R9, and R2.
Specific example 5: 96-bit subtraction
SUBS R6, R6, R9
SBCS R9, R2, R1
SBC R2, R8, R11
3.5.2

AND, ORR, EOR, BIC, and ORN

Logical AND, OR, Exclusive OR, Bit Clear, and OR NOT.
Syntax
op{S}{cond} {Rd,} Rn, Operand2
Where:
•
'op' is one of:
AND: Logical AND.
ORR: Logical OR or bit set.
EOR: Logical exclusive OR.
BIC: Logical AND NOT or bit clear.
ORN: Logical OR NOT.
•
'S' is an optional suffix. If S is specified, the condition code flags are updated on the
result of the operation, see
•
'cond' is an optional condition code, see
•
'Rd' is the destination register.
•
'Rn' is the register holding the first operand.
•
'Operand2' is a flexible second operand, see
details of the options.
Operation
The AND, EOR, and ORR instructions perform bitwise AND, exclusive OR, and OR
operations on the values in Rn and operand2.
The BIC instruction performs an AND operation on the bits in Rn with the complements of
the corresponding bits in the value of operand2.
The ORN instruction performs an OR operation on the bits in Rn with the complements of
the corresponding bits in the value of operand2.
Restrictions
Do not use either SP or PC.
shows instructions that subtract a 96-bit integer contained in R9, R1, and R11
; subtract the least significant words
; subtract the middle words with carry
; subtract the most significant words with carry
Conditional execution on page
PM0214 Rev 9
The STM32 Cortex-M4 instruction set
Specific example 5: 96-bit
65.
Conditional execution on page
Flexible second operand on page 60
65.
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