Cmsis Intrinsic Functions - ST STM32H7 Series Programming Manual

The STM32 Cortex-M4 instruction set
Mnemonic
VMOV
VMOV
VMRS
VMSR
VMUL.F32
VNEG.F32
VNMLA.F32
VNMLS.F32
VNMUL
VPOP
VPUSH
VSQRT.F32
VSTM
WFE
WFI
3.2

CMSIS intrinsic functions

ISO/IEC C code cannot directly access some Cortex-M4 instructions. This section describes
intrinsic functions that can generate these instructions, provided by the CMIS, and that
might be provided by a C compiler. If a C compiler does not support an appropriate intrinsic
function, you might have to use an inline assembler to access some instructions.
The CMSIS provides the intrinsic functions listed in
ANSI cannot directly access.
58/262
Table 21. Cortex-M4 instructions (continued)
Operands
Copy Arm core register to
Dd[x], Rt
scalar
Copy scalar to Arm core
Rt, Dn[x]
register
Move FPSCR to Arm core
Rt, FPSCR
register or APSR
Move to FPSCR from Arm
FPSCR, Rt
Core register
{Sd,} Sn, Sm Floating-point multiply
Sd, Sm Floating-point negate
Floating-point multiply and
Sd, Sn, Sm
add
Floating-point multiply and
Sd, Sn, Sm
subtract
{Sd,} Sn, Sm Floating-point multiply
list Pop extension registers
list Push extension registers
Calculates floating-point
Sd, Sm
square root
Floating-point register store
Rn{!}, list
multiple
— Wait for event
— Wait for interrupt
PM0214 Rev 9
Brief description
Table 22 to generate instructions that
PM0214
Flags Page
3.10.15 on page
—
165
3.10.16 on page
—
166
3.10.19 on page
N,Z,C,V
169
3.10.20 on page
FPSCR
170
3.10.21 on page
—
171
3.10.22 on page
—
172
3.10.23 on page
—
173
3.10.23 on page
—
173
3.10.23 on page
—
173
3.10.24 on page
—
174
3.10.25 on page
—
175
3.10.26 on page
—
176
3.10.27 on page
—
177
— 3.11.11 on page 191
3.11.12 on page
—
192