Epson S1C63003 Technical Manual page 106

12 i/O PORTS
P00
Address
Interrupt polarity select
register (PCP00)
Address
Interrupt select
register (SIP00)
Address
Interrupt mask
register (EIK00)
Address
P01
P02
P03
Noise reject select
register (NRSP[1:0])
Address
P10
Address
Interrupt polarity select
register (PCP10)
Address
Interrupt select
register (SIP10)
Address
Interrupt mask
register (EIK10)
Address
P11
P12
P13
Noise reject select
register (NRSP1[1:0])
Address
The interrupt select registers (SIP0[3:0], SIP1[3:0]) and interrupt polarity select registers (PCP0[3:0], PCP1[3:0]) are
individually provided for the I/O ports P00–P03 and P10–P13.
The interrupt select registers (SIPxx) select the ports to be used for generating interrupts or canceling SLEEP mode.
Writing "1" to an interrupt select register incorporates that port into the key input interrupt generation conditions.
Changing the port where the interrupt select register has been set to "0" does not affect the generation of the inter-
rupt.
The key input interrupt timing can be selected using the interrupt polarity select registers (PCPxx) so that an interrupt
will be generated at the rising edge or falling edge of the input.
By setting these two conditions, an interrupt request signal and a SLEEP cancellation signal are generated at the rising
or falling edge (selected by PCPxx) of the signal input to the port (selected by SIPxx).
When a key input interrupt factor occurs, the interrupt factor flag (IK00–IK03, IK10–IK13) is set to "1." At the
same time, an interrupt request is generated to the CPU if the corresponding interrupt mask register (EIK00–EIK03,
EIK10–EIK13) is set to "1."
12-4
Noise
rejector
Noise
rejector
Figure 12. 6.1 Key input interrupt circuit configuration
Seiko epson Corporation
Interrupt factor
MUX
flag (IK00)
Address
(S1C63003/004/008/016)
Interrupt factor
MUX
flag (IK10)
Address
(S1C63004/008/016)
S1C63003/004/008/016 TeChniCal Manual
Sleep
cancellation
Interrupt
request
Sleep
cancellation
Interrupt
request
(Rev. 1.1)