I/O Memory Of I/O Ports - Epson S1C63003 Technical Manual

When the interrupt mask register (EIKxx) is set to "0," the interrupt request is masked and no interrupt is generated
to the CPU.
The key input interrupt circuit has a noise rejector to avoid unnecessary interrupt generation due to noise or chattering.
This noise rejector allows selection of a noise-reject frequency from among three types shown in Table 12.6.1. Use the
NRSP0[1:0] register for P00–P03 ports or NRSP1[1:0] register for P10–P13 ports to select a noise-reject frequency.
If a pulse shorter than the selected width is input to the port, an interrupt is not generated. When high speed response
is required, turns the noise rejecter off (bypassed).
NRSP0[1:0]/NRSP1[1:0]
Notes: • Be sure to turn the noise rejector off before executing the SLP instruction.
• Reactivating from SLEEP status can only be done by generation of a key input interrupt factor.
Therefore when using the SLEEP function, it is necessary to set the interrupt select register
(SIPxx = "1") of the port to be used for releasing SLEEP status before executing the SLP instruc-
tion. Furthermore, enable the key input interrupt using the corresponding interrupt mask register
(EIKxx = "1") before executing the SLP instruction to run key input interrupt handler routine after
SLEEP status is released.
12.7

i/O memory of i/O ports

Table 12.7.1 shows the I/O addresses and the control bits for the I/O ports.
Address Register name R/W Default
FF11H D3 nRSP11 (*6) R/W
D2 nRSP10 (*6)
R/W
D1 nRSP01
R/W
D0 nRSP00
R/W
FF20H D3 P03
R/W
D2 P02
R/W
D1 P01
R/W
D0 P00
R/W
FF21H D3 iOC03
R/W
D2 iOC02
R/W
D1 iOC01 R/W
D0 iOC00 R/W
FF22H D3 Pul03
R/W
D2 Pul02 R/W
D1 Pul01 R/W
D0 Pul00 R/W
FF23H D3 SMT03 R/W
D2 SMT02 R/W
D1 SMT01 R/W
D0 SMT00 R/W
FF24H D3 P13 R/W
D2 P12 R/W
D1 P11 R/W
D0 P10 R/W
FF25H D3 iOC13 R/W
D2 iOC12 R/W
D1 iOC11 R/W
D0 iOC10
R/W
S1C63003/004/008/016 TeChniCal Manual
(Rev. 1.1)
Table 12. 6.1 Setting up noise rejector
Noise reject frequency
3 f / 256 (128 Hz)
OSC1
2 f / 64 (512 Hz)
OSC1
1 f / 16 (2 kHz)
OSC1
0 Off (bypassed)
Table 12. 7.1 Control bits of I/O ports
Setting/data
0 3 f /256
1
0 2 f /64
1
0 3 f /256
1
0 2 f /64
1
1 1 High
1 1 High
1 1 High
1 1 High
0 1 Output
0 1 Output
0 1 Output
0 1 Output
1 1 Enable
1 1 Enable
1 1 Enable
1 1 Enable
1 1 Schmitt
1 1 Schmitt
1 1 Schmitt
1 1 Schmitt
1 1 High
1 1 High
1 1 High
1 1 High
0 1 Output
0 1 Output
0 1 Output
0 1 Output
Seiko epson Corporation
Reject pulse width
7.8 msec
2.0 msec
0.5 msec
1 f /16 P1 key input interrupt noise reject frequency
1
0 Off selection (f
1 f /16 P0 key input interrupt noise reject frequency
1
0 Off selection (f
0 Low P03 I/O port data
0 Low P02 I/O port data
0 Low P01 I/O port data
0 Low P00 I/O port data
0 Input P03 I/O control register
0 Input P02 I/O control register
0 Input P01 I/O control register
0 Input P00 I/O control register
0 Disable P03 pull-down control register
0 Disable P02 pull-down control register
0 Disable P01 pull-down control register
0 Disable P00 pull-down control register
0 CMOS P03 input I/F level select register
0 CMOS P02 input I/F level select register
0 CMOS P01 input I/F level select register
0 CMOS P00 input I/F level select register
0 Low P13 I/O port data
0 Low P12 I/O port data
0 Low P11 I/O port data
0 Low P10 I/O port data
0 Input P13 I/O control register
0 Input P12 I/O control register
0 Input P11 I/O control register
0 Input P10 I/O control register
12 i/O PORTS
–
Function
= f )
1 OSC1
= f )
1 OSC1
12-5