I/O Memory Of Integer Multiplier - Epson S1C63003 Technical Manual

Cmos 4-bit single chip microcontroller
Table of Contents

Advertisement

ldb
%ext, rslt_data@h
ldb
%xl, rslt_data@l
nop
nop
nop
;
bit
[%y], 0b0100
jrnz
overflow
;
add
%y, -4
;
ldb
%ba, [%y]+
ldb
[%x]+, %ba
ldb
%ba, [%y]+
ldb
[%x]+, %ba
18.6

i/O Memory of integer Multiplier

Table 18.6.1 shows the I/O addresses and the control bits for the integer multiplier.
Address
Register name R/W Default
FF16H D3 MDCKe (*5)
R/W
D2 SGCKE
R/W
D1 SWCKE
R/W
D0 RTCKE
R/W
D3 SR3
FF70H
R/W
(*5)
D2 SR2
R/W
D1 SR1
R/W
D0 SR0
R/W
FF71H
D3 SR7
R/W
(*5)
D2 SR6
R/W
D1 SR5
R/W
D0 SR4
R/W
FF72H
D3 DRl3
R/W
(*5)
D2 DRl2
R/W
D1 DRl1
R/W
D0 DRl0
R/W
FF73H
D3 DRl7
R/W
(*5)
D2 DRl6
R/W
D1 DRl5
R/W
D0 DRl4
R/W
FF74H
D3 DRh3
R/W
(*5)
D2 DRh2
R/W
D1 DRh1
R/W
D0 DRh0
R/W
D3 DRh7
FF75H
R/W
D2 DRh6
(*5)
R/W
D1 DRh5
R/W
D0 DRh4
R/W
D3 nF
FF76H
D2 VF
(*5)
D1 ZF
D0 CalMD
R/W
*1 Initial value at initial reset
*4 Unused in the S1C63003/004/008
S1C63003/004/008/016 TeChniCal Manual
(Rev. 1.1)
; Set result store address
; Dummy instructions to wait end of operation
; Jump to error routine if VF = "1"
; Set DRL again
; Store result (quotient) into RAM
; Store result (remainder) into RAM
Table 18.
6.1 Control bits of integer multiplier
Setting/data
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
×
×
0H–FH
×
×
×
×
0H–FH
×
×
×
×
0H–FH
×
×
×
×
0H–FH
×
×
×
×
0H–FH
×
×
×
×
0H–FH
×
×
R
0
1 Negative
R
0
1 Overflow
R
0
1 Zero
0
1 Division (W)
Run (R)
*2 Not set in the circuit
*5 Unused in the S1C63003/004
Seiko epson Corporation
0 Disable
Integer multiplier clock enable
0 Disable
Sound generator clock enable
0 Disable
Stopwatch timer clock enable
0 Disable
Clock timer clock enable
Source register (low-order 4 bits)
SR0 = LSB
Source register (high-order 4 bits)
SR7 = MSB
Low-order 8-bit destination register
(low-order 4 bits)
DRL0 = LSB
Low-order 8-bit destination register
(high-order 4 bits)
DRL7 = MSB
High-order 8-bit destination register
(low-order 4 bits)
DRH0 = LSB
High-order 8-bit destination register
(high-order 4 bits)
DRH7 = MSB
0 Positive
Negative flag
0 No
Overflow flag
0 No
Zero flag
0 Multiplication (W)
Calculation mode selection (writing)
Stop (R)
Operation status (reading)
*3 Constantly "0" when being read
*6 Unused in the S1C63003
18 inTeGeR MulTiPlieR
Function
18-3

Advertisement

Table of Contents
loading

This manual is also suitable for:

S1c63004S1c63008S1c63016

Table of Contents