I/O Memory Of Interrupt Controller - Epson S1C63003 Technical Manual

Cmos 4-bit single chip microcontroller
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CALR
INTRFC
RETI
INT_DUMMY:
RETI
;******************************************************************************
;**
Interrupt RFC
;******************************************************************************
.org
0x800
INTRFC:
LDB
%yl,P5CTL0@l
LDB
%xl,ITC_RFC1@l
LD
[%y],[%x]
RET
6.5

i/O Memory of interrupt Controller

Table 6.5.1 shows the I/O addresses and the control bits for controlling interrupts.
Address
Register name R/W Default
FFE1H D3 0 (*3)
D2 eiRFe
R/W
D1 eiRFR
R/W
D0 eiRFS
R/W
FFE2H D3 0 (*3)
D2 0 (*3)
D1 eiPT0
R/W
D0 eiCTC0 (*6)
R/W
FFE3H
D3 0 (*3)
(*6)
D2 0 (*3)
D1 eiPT1
R/W
D0 eiCTC1
R/W
FFE4H
D3 0 (*3)
(*6)
D2 0 (*3)
D1 eiPT2
R/W
D0 eiCTC2
R/W
FFE5H
D3 0 (*3)
(*4)
D2 0 (*3)
D1 eiPT3
R/W
D0 eiCTC3
R/W
FFEAH
D3 0 (*3)
(*6)
D2 0 (*3)
D1 0 (*3)
D0 eiSiF
R/W
FFEBH D3 eiK03
R/W
D2 eiK02
R/W
D1 eiK01
R/W
D0 eiK00
R/W
FFECH
D3 eiK13
R/W
(*6)
D2 eiK12
R/W
D1 eiK11
R/W
D0 eiK10
R/W
FFEDH D3 eiRun (*6)
R/W
D2 eilaP (*6)
R/W
D1 eiSW1
R/W
D0 eiSW10
R/W
FFEEH D3 eiT3 (*6)
R/W
D2 eiT2
R/W
D1 eiT1 (*6)
R/W
D0 eiT0 (*6)
R/W
FFEFH D3 eiT7
R/W
D2 eiT6
R/W
D1 eiT5 (*6)
R/W
D0 eiT4
R/W
S1C63003/004/008/016 TeChniCal Manual
(Rev. 1.1)
;call Interrupt RFC
**
;Port Output
Table 6.
5.1 Control bits of interrupt controller
Setting/data
R
– (*2)
0
1 Enable
0
1 Enable
0
1 Enable
R
– (*2)
R
– (*2)
0
1 Enable
0
1 Enable
R
– (*2)
R
– (*2)
0
1 Enable
0
1 Enable
R
– (*2)
R
– (*2)
0
1 Enable
0
1 Enable
R
– (*2)
R
– (*2)
0
1 Enable
0
1 Enable
R
– (*2)
R
– (*2)
R
– (*2)
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
0
1 Enable
Seiko epson Corporation
Unused
0 Mask
Interrupt mask register (RFC error)
0 Mask
Interrupt mask register (RFC REF completion)
0 Mask
Interrupt mask register (RFC SEN completion)
Unused
Unused
0 Mask
Interrupt mask register (PT0 underflow)
0 Mask
Interrupt mask register (PT0 compare match)
Unused
Unused
0 Mask
Interrupt mask register (PT1 underflow)
0 Mask
Interrupt mask register (PT1 compare match)
Unused
Unused
0 Mask
Interrupt mask register (PT2 underflow)
0 Mask
Interrupt mask register (PT2 compare match)
Unused
Unused
0 Mask
Interrupt mask register (PT3 underflow)
0 Mask
Interrupt mask register (PT3 compare match)
Unused
Unused
Unused
0 Mask
Interrupt mask register (Serial I/F)
0 Mask
Interrupt mask register (KEY03<P03>)
0 Mask
Interrupt mask register (KEY02<P02>)
0 Mask
Interrupt mask register (KEY01<P01>)
0 Mask
Interrupt mask register (KEY00<P00>)
0 Mask
Interrupt mask register (KEY13<P13>)
0 Mask
Interrupt mask register (KEY12<P12>)
0 Mask
Interrupt mask register (KEY11<P11>)
0 Mask
Interrupt mask register (KEY10<P10>)
0 Mask
Interrupt mask register (SW direct RUN)
0 Mask
Interrupt mask register (SW direct LAP)
0 Mask
Interrupt mask register (Stopwatch 1 Hz)
0 Mask
Interrupt mask register (Stopwatch 10 Hz)
0 Mask
Interrupt mask register (Clock timer 16 Hz)
0 Mask
Interrupt mask register (Clock timer 32 Hz)
0 Mask
Interrupt mask register (Clock timer 64 Hz)
0 Mask
Interrupt mask register (Clock timer 128 Hz)
0 Mask
Interrupt mask register (Clock timer 1 Hz)
0 Mask
Interrupt mask register (Clock timer 2 Hz)
0 Mask
Interrupt mask register (Clock timer 4 Hz)
0 Mask
Interrupt mask register (Clock timer 8 Hz)
6 inTeRRuPT COnTROlleR
Function
6-5

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