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20
Basic External Wiring Diagram
P00–P03
I/O
P10–P13
P20–P23
P30–P33
P40–P43
RFOUT/P50
SEN0/P51
R
TMP
REF0/P52
R
REF1
RFIN0/P53
HUD
R
HUD
SEN1
REF1
R
REF2
RFIN1
Recommended values for external parts
Symbol
X'tal
C
G1
Ceramic
*4
G3 *4
C
D3 *4
C
C
1
C
2
C
3
C
4
C
5
C
6
C
P
Cres
*1: S1C63003
*2: Not available in the S1C63003
*3: Not available in the S1C63003/004
*4: Not used in the S1C63003
note: The values in the above table are shown only for reference and not guaranteed.
S1C63003/004/008/016 TeChniCal Manual
(Rev. 1.1)
LCD panel
*2
*3
S1C630xx
[The potential of the substrate
(back of the chip) is V
Name
Crystal resonator
Trimmer capacitor
Ceramic resonator
Gate capacitor
Drain capacitor
Booster capacitor
Capacitor between V
and V
SS
Capacitor between V
and V
SS
Capacitor between V
and V
SS
Capacitor between V
and V
SS
Capacitor between V
and V
SS
Capacitor for power supply
Capacitor for RESET terminal
Seiko epson Corporation
20 BaSiC eXTeRnal WiRinG DiaGRaM
V
RESET
V
OSC
.]
SS
TEST
V
OSC1
OSC2
OSC3
OSC4
Recommended value
32.768 kHz
0 to 25 pF
4 MHz (3 V model)
1 MHz (1.5 V model)
30 pF (Ceramic oscillation)
30 pF (Ceramic oscillation)
0.1 µF
0.1 µF
D1
0.1 µF
OSC
0.1 µF
C1
0.1 µF
C2
0.1 µF
C3
3.3 µF
0.47 µF
CA
C
1
CB
DD
Cres
5.5 V
+
1.8 V
C
P
1.7 V
C
2
V
D1
C
3
1.1 V
C
4
V
C1
C
5
V
C2
C
6
V
C3
SS
C
G1
X'tal
C
G3
*2
Ceramic
*2
C
D3
|
or
|
* Mask
option
20-1
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