Appendix E Summary Of Notes; Summary Of Notes By Function - Epson S1C63003 Technical Manual

Appendix E Summary of Notes

e.1

Summary of notes by Function

Here, the cautionary notes are summed up by function category. Keep these notes well in mind when programming.
Memory and stack
• Memory is not implemented in unused areas within the memory map. Further, some non-implementation areas
and unused (access prohibition) areas exist in the peripheral I/O area. If the program that accesses these areas
is generated, its operation cannot be guaranteed.
• Part of the RAM area is used as a stack area for subroutine call and register evacuation, so pay attention not to
overlap the data area and stack area.
• The S1C63000 core CPU handles the stack using the stack pointer for 4-bit data (SP2) and the stack pointer
for 16-bit data (SP1). 16-bit data are accessed in stack handling by SP1, therefore, this stack area should be al-
located to the area where 4-bit/16-bit access is possible (0100H to 01FFH, 0100H to 017FH in the S1C63003).
Memory accesses except for stack operations by SP1 are 4-bit data access.
The stack address management requires caution as the stack pointers may be set to an address out of the RAM
address range.
After initial reset, all the interrupts including NMI are masked until both the stack pointers SP1 and SP2 are
set by software. Further, if either SP1 or SP2 is re-set when both are set already, the interrupts including NMI
are masked again until the other is re-set. Therefore, the settings of SP1 and SP2 must be done as a pair.
Power control
• When a 3.0 V LCD drive voltage is supplied to the V
separated power sources for V
• Do not use the V , V
D1
• The LCD system voltage regulator takes about 100 msec for stabilizing the LCD drive voltages after writing
"1" to LPWR.
• Do not select the reference voltage V
• Current consumption increases in heavy load protection mode, therefore do not set heavy load protection mode
with software if unnecessary.
interrupt
• The interrupt factor flags are set when the interrupt condition is established, even if the interrupt mask registers
are set to "0."
• After an interrupt occurs, the same interrupt will occur again if the interrupt enabled state (I flag = "1") is set or
the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure to reset (write "1"
to) the interrupt factor flag in the interrupt service routine before shifting to the interrupt enabled state.
• After an initial reset, all the interrupts including NMI are masked until both the stack pointers SP1 and SP2
are set with the software. Be sure to set the SP1 and SP2 in the initialize routine. Further, when re-setting the
stack pointer, the SP1 and SP2 must be set as a pair. When one of them is set, all the interrupts including NMI
are masked and interrupts cannot be accepted until the other one is set.
• The interrupt handler routine must be located within the range from "Interrupt vector address (100H–10FH)"
-7FH to +80H. If it is difficult, make a relay point within that range as the destination of the vector jump and
branch the program to the interrupt handler from there.
• Both the OSC1 and OSC3 oscillation circuits stop oscillating when the CPU enters SLEEP mode. To prevent
the CPU from a malfunction when it resumes operating from SLEEP mode, switch the CPU clock to OSC1
before placing the CPU into SLEEP mode.
S1C63003/004/008/016 TeChniCal Manual
(Rev. 1.1)
and V /V and supply a voltage within 1.1 V to 1.7 V to the V
DD C3 C2
and V to V terminal output voltages to drive external circuits.
OSC C1 C3
for the S1C63003 1.5 V low-voltage type.
C2
Seiko epson Corporation
aPPenDiX e SuMMaRY OF nOTeS
or V terminal in the 1.5 V low-voltage type, use
C3 C2
terminal.
DD
aP-e-1