Table of Contents
Advertisement
13.8
i/O Memory of Serial interface
Table 13.8.1 shows the I/O addresses and the control bits for the serial interface.
Address
Register name R/W Default
FF14H
D3 0 (*3)
(*6)
D2 SiFCKS2
R/W
D1 SiFCKS1
R/W
D0 SiFCKS0
R/W
FF58H
D3 0 (*3)
(*6)
D2 eSOuT
R/W
D1 SCTRG
R/W
D0 eSiF
R/W
D3 SCPS1
FF59H
R/W
D2 SCPS0
(*6)
R/W
D1 SDP
R/W
D0 SMOD
R/W
FF5AH
D3 0 (*3)
(*6)
D2 0 (*3)
D1 eSReaDY
R/W
D0 enCS
R/W
FF5BH
D3 SD3
R/W
(*6)
D2 SD2
R/W
D1 SD1
R/W
D0 SD0
R/W
FF5CH
D3 SD7
R/W
(*6)
D2 SD6
R/W
D1 SD5
R/W
D0 SD4
R/W
*1 Initial value at initial reset
*4 Unused in the S1C63003/004/008
SiFCKS[2:0]: Serial interface clock frequency select register (FF14h•D[2:0])
Selects the synchronous clock frequency in master mode.
f
OSC1
f
OSC3
* The maximum clock frequency is limited to 1 MHz.
When programmable timer 1 is selected, the programmable timer 1 underflow signal is divided by 2 before it is
used as the synchronous clock. In this case, the programmable timer must be controlled before operating the serial
interface. Refer to the "Programmable Timer" chapter for controlling the programmable timer.
Fix at "0" in slave mode.
At initial reset, this register is set to "0."
S1C63003/004/008/016 TeChniCal Manual
(Rev. 1.1)
Table 13.
8.1 Control bits of serial interface
Setting/data
R
– (*2)
0
7 f
/4
4 PT1
3
0
6 f
/2
3 f
3
0
5 f
2 f
3
R
– (*2)
0
1 Enable
0
1 Trigger (W)
Run (R)
0
1 SIF
3 Negative, ↑
0
2 Negative, ↓
0
0
1 MSB first
0
1 Master
R
– (*2)
R
– (*2)
0
1 SRDY
0
1 SRDY_SS
×
×
×
×
×
×
×
×
*2 Not set in the circuit
*5 Unused in the S1C63003/004
Table 13.
8.2 Serial interface clock frequencies
SIFCKS[2:0]
7
6
5
4
3
2
1
0
: OSC1 oscillation frequency. ( ) indicates the frequency when f
: OSC3 oscillation frequency
Seiko epson Corporation
–
Unused
1 f
Serial I/F clock frequency selection
1
/4
0 Off/
(f
= f
1
1
OSC1
/2
External
1
–
Unused
0 Disable
SOUT enable
0 Invalid (W)
Serial I/F clock trigger (writing)
Stop (R)
Serial I/F clock status (reading)
0 I/O
Serial I/F enable (P3 port function selection)
1 Positive, ↓
Serial I/F clock format selection
0 Positive, ↑
(polarity, phase)
0 LSB first
Serial I/F data input/output permutation
0 Slave
Serial I/F mode selection
–
Unused
–
Unused
0 SS
SRDY_SS function selection (ENCS = "1")
0 P33
SRDY_SS enable (P33 port function selection)
Serial I/F transmit/receive data
(low-order 4 bits)
0H–FH
SD0 = LSB
Serial I/F transmit/receive data
(high-order 4 bits)
0H–FH
SD7 = MSB
*3 Constantly "0" when being read
*6 Unused in the S1C63003
SIF clock (master mode)
f
/ 4 *
OSC3
f
/ 2 *
OSC3
f
/ 1 *
OSC3
Programmable timer 1 *
f
/ 4 (8 kHz)
OSC1
f
/ 2 (16 kHz)
OSC1
f
/ 1 (32 kHz)
OSC1
Off (slave mode) *
13 SeRial inTeRFaCe
Function
, f
= f
)
3
OSC3
= 32 kHz.
OSC1
13-9
Advertisement
Table of Contents
