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20 Multiplier/Divider (COPRO2)
20.1 Overview
COPRO2 is the coprocessor that provides multiplier/divider functions. The features of COPRO2 are listed below.
• Multiplication:
• Multiplication and accumulation (MAC): Supports signed/unsigned MAC operations with overflow detection
• Division:
Figure 20.1.1 shows the COPRO2 configuration.
S1C17 Core
20.2 Operation Mode and Output Mode
COPRO2 operates according to the operation mode specified by the application program. As listed in Table 20.2.1,
COPRO2 supports 11 operations.
The multiplication, division and MAC results are 32-bit data, therefore, the S1C17 Core cannot read them in one
access cycle. The output mode is provided to specify the high-order 16 bits or low-order 16 bits of the operation
result register 0 or 1 to be read from COPRO2.
The operation and output modes can be specified with a 7-bit data by writing it to the mode setting register in
COPRO2. Use a "ld.cw" instruction for this writing.
ld.cw
%rd,%rs
ld.cw
%rd,imm7
6
Output mode setting value
S1C17W12/W13 TECHNICAL MANUAL
(Rev. 1.2)
Supports signed/unsigned multiplications.
(16 bits × 16 bits = 32 bits)
Can be executed in 1 cycle.
function. (16 bits × 16 bits + 32 bits = 32 bits)
Can be executed in 1 cycle.
Supports signed/unsigned divisions.
(32 bits ÷ 32 bits = 32 bits with 32-bit reminder)
Can be executed in 17 to 20 cycles.
Overflow detection and division by zero processing are not supported.
COPRO2
Argument 2
Argument 1
Operation result
register 1
Coprocessor
output
Flag output
Figure 20.1.1 COPRO2 Configuration
%rs[6:0] is written to the mode setting register. (%rd: not used)
imm7[6:0] is written to the mode setting register. (%rd: not used)
4
Figure 20.2.1 Mode Setting Register
Seiko Epson Corporation
Arithmetic unit
Operation result
Operation result
register 0
Selector
3
Operation mode setting value
20 Multiplier/Divider (COPRO2)
Mode setting
0
20-1
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