System-Protect Function; Instruction Cache; Memory Mapped Access Area For External Flash Memory - Epson S1C31W74 Technical Manual

Peripheral circuit
USB 2.0 FS device controller
(USB)
Supply voltage detector
(SVD2) Ch.1
DMA controller (DMAC)

4.6.1 System-Protect Function

The system-protect function protects control registers and bits from writings. They cannot be rewritten unless write
protection is removed by writing 0x0096 to the SYSPROT.PROT[15:0] bits. This function is provided to prevent
deadlock that may occur when a system-related register is altered by a runaway CPU. See "Control Registers" in
each peripheral circuit to identify the registers and bits with write protection.
Note: Once write protection is removed using the SYSPROT.PROT[15:0] bits, write enabled status is
maintained until write protection is applied again. After the registers/bits required have been al-
tered, apply write protection.

4.7 Instruction Cache

This IC includes an instruction cache. Enabling the cache function translates into reduced current consumption, as
the Flash memory access frequency is decreased.
This function is enabled by setting the CACHECTL.CACHEEN bit to 1. Setting this bit to 0 clears the instruction
codes stored in the cache.

4.8 Memory Mapped Access Area For External Flash Memory

This area is used to read data from the external Flash memory via the quad synchronous serial interface. For more
information, refer to the "Quad Synchronous Serial Interface" chapter.
S1C31W74 TECHNICAL MANUAL
(Rev. 1.1)
Address
0x4000 0970 USBMISCCTL
0x4000 0974 USBMISCWRDMAEN USB FIFO Write DMA Request Enable Register
0x4000 0976 USBMISCRDDMAEN USB FIFO Read DMA Request Enable Register
0x4000 0980 SVD2_1CLK
0x4000 0982 SVD2_1CTL
0x4000 0984 SVD2_1INTF
0x4000 0986 SVD2_1INTE
0x4000 1000 DMACSTAT
0x4000 1004 DMACCFG
0x4000 1008 DMACCPTR
0x4000 100c DMACACPTR
0x4000 1014 DMACSWREQ
0x4000 1020 DMACRMSET
0x4000 1024 DMACRMCLR
0x4000 1028 DMACENSET
0x4000 102c DMACENCLR
0x4000 1030 DMACPASET
0x4000 1034 DMACPACLR
0x4000 1038 DMACPRSET
0x4000 103c DMACPRCLR
0x4000 104c DMACERRIF
0x4000 2000 DMACENDIF
0x4000 2008 DMACENDIESET
0x4000 200c DMACENDIECLR
0x4000 2010 DMACERRIESET
0x4000 2014 DMACERRIECLR
Seiko Epson Corporation
Register name
USB Misc Control Register
SVD2 Ch.1 Clock Control Register
SVD2 Ch.1 Control Register
SVD2 Ch.1 Status and Interrupt Flag Register
SVD2 Ch.1 Interrupt Enable Register
DMAC Status Register
DMAC Configuration Register
DMAC Control Data Base Pointer Register
DMAC Alternate Control Data Base Pointer Register
DMAC Software Request Register
DMAC Request Mask Set Register
DMAC Request Mask Clear Register
DMAC Enable Set Register
DMAC Enable Clear Register
DMAC Primary-Alternate Set Register
DMAC Primary-Alternate Clear Register
DMAC Priority Set Register
DMAC Priority Clear Register
DMAC Error Interrupt Flag Register
DMAC Transfer Completion Interrupt Flag Register
DMAC Transfer Completion Interrupt Enable Set Register
DMAC Transfer Completion Interrupt Enable Clear Register
DMAC Error Interrupt Enable Set Register
DMAC Error Interrupt Enable Clear Register
4 MEMORY AND BUS
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