Sfr Definition 26.5. Int_Flags - Silicon Laboratories Si4010-C2 Manual

Si4010-C2

SFR Definition 26.5. INT_FLAGS

Bit 7
Name Reserved Reserved
R
Type
0
Reset
SFR Address = 0xBF
Bit Name
7:5 Reserved Read as 0x0. Write has no effect.
VOID1_ Spare Interrupt Flag (can be used freely by the user application software).
4
FLAG
Interrupt can be invoked by software only by writing 1 here.
VOID0_
Spare Interrupt Flag (can be used freely by the user application software).
3
FLAG
Interrupt can be invoked by software only by writing 1 here.
Set when TX Data Holding Register becomes Empty.
ODS_
2
It must be cleared by software BEFORE writing a new byte into the ODS Tx data
FLAG
register. Hardware will not clear this bit.
Set by Selected GPIO Input by a Selected Edge.
INT1_
1
It gets set irrespective of the EINT0 setting. It must be cleared by software. Hard-
FLAG
ware will not clear this bit.
Set by Selected GPIO Input by a Selected Edge.
INT0_
0
It gets set irrespective of the EINT0 setting. It must be cleared by software. Hard-
FLAG
ware will not clear this bit.
98
6 5 4
Reserved VOID1_
FLAG
R R R/W
0 0 0
Rev. 1.0
3 2
VOID0_ ODS_
FLAG FLAG
R/W R/W
0 0
Function
1 0
INT1_ INT0_
FLAG FLAG
R/W R/W
0 0