Table 25.2. Special Function Registers - Silicon Laboratories Si4010-C2 Manual

Si4010-C2
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
Register Address
0xE0
ACC
0xF0
B
0xDD
BOOT_FLAGS
0x8F
CLKOUT_SET
0x83
DPH
0x82
DPL
0xE6
EIE1
0xF6
EIP1
0x9B
FC_CTRL
0x9D
FC_INTERVAL
0x85
GFM_CONST
0x84
GFM_DATA
0xB1
GPR_CTRL
0xB2
GPR_DATA
0xA8
IE
0xB8
IP
0xBF
INT_FLAGS
0xE4
LC_FSK
0xA9
ODS_CTRL
0xAB
ODS_DATA
0xAD
ODS_RATEH
0xAC
ODS_RATEL
0xAA
ODS_TIMING
0xAE
ODS_WARM1
0xAF
ODS_WARM2
0x80
P0
0xA4
P0CON
0x90
P1
0xA5
P1CON
0xA0
P2
0xCE
PA_LVL
0x87
PCON
0xB5
PORT_CTRL
86

Table 25.2. Special Function Registers

Accumulator
B Register
Boot Flags
Clock Output Settings
Data Pointer High
Data Pointer Low
Extended Interrupt Enable 1
Extended Interrupt Priority 1
Frequency Counter Control
Frequency Counter Interval
AES GFM Multiplier Constant
AES GFM Data
General Purpose Control Register
General Purpose Data Register
Interrupt Enable
Interrupt Priority
Interrupt Flags
LC FSK Deviation
ODS Control
ODS Data
ODS Rate High Byte
ODS Rate Low Byte
ODS Timing Register
ODS Warm up times for PA and Divider
ODS Warm up time for LCOSC
Port 0 Latch
Port 0 Configuration
Port 1 Latch
Port 1 Configuration
Port 2 Latch
Power Amplifier Level
Power Control
Port Control
Rev. 1.0
Description Page
62
63
78
124
61
61
96
97
52
53
104
104
126
126
94
95
98
46
41
43
44
43
42
44
45
118
119
119
120
120
38
102
121