Figure 30.2. Gpio[3:1] Functional Diagram; Figure 30.3. Other Gpio Functional Diagram - Silicon Laboratories Si4010-C2 Manual

Si4010-C2
Digital logic
Wr: PORT_MATRIX
Wr: PORT_ROFF
PORT_STROBE
Rd: PORT_MATRIX
Rd: PORT_ROFF
port_push_pull[n]
port_oe[n]
port_dataout[n]
Functional diagram of the other GPIO ports is in Figure 30.3. It is the general GPIO circuit that can be
forced by digital control to have limited functionality (e.g., as input only, etc.).
Digital logic
port_push_pull[n]
port_oe[n]
port_dataout[n]
110
E
E
gpio_in[n]
gpio_push_pull[n]
gpio_dataout[n]

Figure 30.2. GPIO[3:1] Functional Diagram

gpio_in[n]
gpio_push_pull[n]
gpio_dataout[n]

Figure 30.3. Other GPIO Functional Diagram

Rev. 1.0
GPIO Pads
1
3
2 2
Vcc
GPIO Pads
Vcc
~50k
~50k
GPIO[n]
GPIO[n]