Silicon Laboratories Si4704 Series Programming Manual
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Silicon Laboratories Si4704 Series Programming Manual

Silicon Laboratories Si4704 Series Programming Manual

Am/fm/sw/lw/wb receiver
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S i 4 7 0 4 / 0 5 / 0 6 / 0 7 / 1
A M / F M / S W / LW / W B R

1. Introduction

1.1. Scope

This document provides an overview of the programming requirements for the Si4704/05/06/1x/2x/3x/4x FM
transmitter/AM/FM/SW/LW/WB receiver. The hardware control interface and software commands are detailed
along with several examples of the required steps to configure the device for various modes of operation.

2. Overview

This family of products is programmed using commands and responses. To perform an action, the system
controller writes a command byte and associated arguments, causing the device to execute the given command.
The device will, in turn, provide a response depending on the type of command that was sent. "4. Commands and
Responses" on page 5 and "5. Commands and Properties" on page 6 describe the procedures for using
commands and responses and provide complete lists of commands, properties, and responses.
The device has a slave control interface that allows the system controller to send commands to and receive
responses from the device using one of three serial protocols (or bus modes): 2-wire mode (I
compatible), 3-wire mode, or SPI mode. "6. Control Interface" on page 168 describes the control interface in detail.
"7. Powerup" on page 176 describes options for the sequencing of VDD and VIO power supplies, selection of the
desired bus mode, provision of the reference clock, RCLK, and sending of the POWER_UP command.
"8. Powerdown" on page 182 describes sending the POWER_DOWN command and removing VDD and VIO
power supplies as necessary.
"9. Digital Audio Interface" on page 183 describes the digital audio format supported and how to operate the device
in digital mode.
"10. Timing" on page 186 describes the CTS (Clear to Send) timing indicating when the command has been
accepted and in most cases completed execution, and the STC (Seek/Tune Complete) timing indicating when the
Seek/Tune commands have completed execution.
"11. FM Transmitter" on page 191 describes the audio dynamic range control, limiter, pre-emphasis,
recommendations for maximizing audio volume for the FM transmitter.
"12. Programming Examples" on page 195 provides flowcharts and step-by-step procedures for programming the
device.
Confidential Rev. 0.2 2/08
Silicon Laboratories Confidential. Information contained herein is covered under non-disclosure agreement (NDA).
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R O G R A M M IN G
Copyright © 2008 by Silicon Laboratories
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AN332
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C and SMBUS
AN332

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  • Page 1: Introduction

    FM transmitter. "12. Programming Examples" on page 195 provides flowcharts and step-by-step procedures for programming the device. Confidential Rev. 0.2 2/08 Copyright © 2008 by Silicon Laboratories AN332 Silicon Laboratories Confidential. Information contained herein is covered under non-disclosure agreement (NDA).
  • Page 2 AN332 Table 1. Product Family Function Part Number General Description Si4700 FM Receiver Si4701 FM Receiver with RDS Si4702 FM Receiver Si4703 FM Receiver with RDS Si4704 FM Receiver Si4705 FM Receiver with RDS Si4706 High Performance RDS Receiver Si4707 WB Receiver with SAME Si4710 FM Transmitter...

  • Page 3: Table Of Contents

    AN332 ABLE O F ONTENTS 1. Introduction .............1 1.1.

  • Page 4: Terminology

    AN332 3. Terminology SEN—Serial enable pin, active low; used as device select in 3-wire and SPI operation and address selection in 2-wire operation. SDIO—Serial data in/data out pin. SCLK—Serial clock pin. RST or RSTb—Reset pin, active low RCLK—External reference clock GPO—General purpose output CTS—Clear to send STC—Seek/Tune Complete...

  • Page 5: Commands And Responses

    AN332 4. Commands and Responses Commands control actions, such as power up, power down, or tune to a frequency, and are one byte in size. Arguments are specific to a given command and are used to modify the command. For example, after the TX_TUNE_FREQ command, arguments are required to set the tune frequency.

  • Page 6: Commands And Properties

    AN332 5. Commands and Properties There are four different components for these product families: 1. FM Transmitter component 2. FM Receiver component 3. AM/SW/LW component 4. WB component The following four subsections list all the commands and properties used by each of the component. 5.1.
  • Page 7 AN332 Table 5. FM Transmitter Property Summary Prop Name Description Default 0x0001 GPO_IEN Enables interrupt sources. 0x0000 0x0101 DIGITAL_INPUT _FORMAT Configures the digital input format. 0x0000 Configures the digital input sample rate in 1 Hz steps. 0x0103 DIGITAL_INPUT _SAMPLE_RATE 0x0000 Default is 0.
  • Page 8 AN332 Table 5. FM Transmitter Property Summary (Continued) Prop Name Description Default Sets the gain for audio dynamic range control. 0x2204 TX_ACOMP_GAIN 0x000F Default is 15 dB. 0x2205 TX_LIMITER_RELEASE_TIME Sets the limiter release time. Default is 102 (5.01 ms) 0x0066 Configures measurements related to signal quality 0x2300 TX_ASQ_INTERRUPT_SOURCE...
  • Page 9 AN332 Table 6. Status Response STATUS RDSINT ASQINT STCINT Name Function Clear to Send. 0 = Wait before sending next command. 1 = Clear to send next command. Error. 0 = No error 1 = Error Reserved Values may vary. RDS Interrupt.
  • Page 10 AN332 5.1.1. Commands and Properties for the FM/RDS Transmitter Command 0x01. POWER_UP Initiates the boot process to move the device from powerdown to powerup mode. The boot can occur from internal device memory or a system controller downloaded patch. To confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the POWER_UP command with Function = 15 (query library ID).
  • Page 11 AN332 Function. 0–1, 3–14 = Reserved. FUNC[3:0] 2 = Transmit. 15 = Query Library ID. Application Setting OPMODE[7:0] 01010000 = Analog audio inputs (LIN/RIN) 00001111 = Digital audio inputs (DIN/DFS/DCLK) Response (to FUNC = 2, TX) STATUS RDSINT ASQINT STCINT Response (to FUNC = 15, Query Library ID) STATUS RDSINT...
  • Page 12 AN332 Command 0x10. GET_REV Returns the part number, chip revision, firmware revision, patch revision and component revision numbers. The command is complete when the CTS bit (and optional interrupt) is set. This command may only be sent when in powerup mode. Command arguments: None Response bytes: Eight Command...
  • Page 13 AN332 Command 0x11. POWER_DOWN Moves the device from powerup to powerdown mode. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note that only the POWER_UP command is accepted in powerdown mode.
  • Page 14 AN332 Command 0x12. SET_PROPERTY Sets a property shown in Table 5, “FM Transmitter Property Summary,” on page 7. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode.
  • Page 15 AN332 Command 0x13. GET_PROPERTY Gets a property shown in Table 5, “FM Transmitter Property Summary,” on page 7. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode.
  • Page 16 AN332 Command 0x14. GET_INT_STATUS Updates bits 6:0 of the status byte. This command should be called after any command that sets the STCINT, ASQINT, or RDSINT bits. When polling this command should be periodically called to monitor the STATUS byte, and when using interrupts, this command should be called after the interrupt is set to update the STATUS byte.
  • Page 17 AN332 Command 0x30. TX_TUNE_FREQ Sets the state of the RF carrier and sets the tuning frequency between 76 and 108 MHz in 10 kHz units and steps of 50 kHz. For example 76.05 MHz = 7605 is valid because it follows the 50 kHz step requirement but 76.01 MHz = 7601 is not valid.
  • Page 18 AN332 Command 0x31. TX_TUNE_POWER Sets the RF voltage level between 88 dBµV and 115 dBµV in 1 dB units. Power may be set as high as 120 dBµV; however, voltage accuracy is not guaranteed. A value of 0x00 indicates off. The command also sets the antenna tuning capacitance.
  • Page 19 AN332 Command 0x32. TX_TUNE_MEASURE (Si4712/13/20/21 Only) Enters receive mode (disables transmitter output power) and measures the received noise level (RNL) in units of dBµV on the selected frequency. The command sets the tuning frequency between 76 and 108 MHz in 10 kHz units and steps of 50 kHz.
  • Page 20 AN332 Command 0x33. TX_TUNE_STATUS Returns the status of the TX_TUNE_FREQ, TX_TUNE_MEASURE, or TX_TUNE_POWER commands. The command returns the current frequency, output voltage in dBµV (if applicable), the antenna tuning capacitance value (0–191) and the received noise level (if applicable). The command clears the STCINT interrupt bit when INTACK bit of ARG1 is set.
  • Page 21 AN332 RESP Name Function Reserved Returns various data. Read Frequency High Byte. READFREQ [7:0] This byte in combination with READFREQ returns frequency being tuned. Read Frequency Low Byte. READFREQ [7:0] This byte in combination with READFREQ returns frequency being tuned. Reserved Returns various data.
  • Page 22 AN332 Command 0x34. TX_ASQ_STATUS Returns status information about the audio signal quality and current FM transmit frequency. This command can be used to check if the input audio stream is below a low threshold as reported by the IALL bit, or above a high threshold as reported by the IALH bit.
  • Page 23 AN332 Response STATUS RDSINT ASQINT STCINT RESP1 OVERMOD IALH IALL RESP2 RESP3 RESP4 INLEVEL[7:0] RESP Name Function Overmodulation Detection. OVERMOD 0 = Output signal is below requested modulation level. 1 = Output signal is above requested modulation level. Input Audio Level Threshold Detect High. IALH 0 = Input audio level high threshold not exceeded.
  • Page 24 AN332 Command 0x35. TX_RDS_BUFF (Si4711/13/21 Only) Loads or clears the RDS group buffer FIFO or circular buffer and returns the FIFO status. The buffer can be allocated between the circular buffer and FIFO with the TX_RDS_FIFO_SIZE property. A common use case for the circular buffer is to broadcast group 2A radio text, and a common use case for the FIFO is to broadcast group 4A real time clock.
  • Page 25 AN332 Name Function RDS Block C High Byte. RDSC [7:0] This byte in combination with RDSC sets the RDS block C data. RDS Block C Low Byte. RDSC [7:0] This byte in combination with RDSC sets the RDS block C data. RDS Block D High Byte.
  • Page 26 AN332 Command 0x36. TX_RDS_PS (Si4711/13/21 Only) Loads or clears the program service buffer. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note: TX_RDS_PS is supported in FMTX component 2.0 or higher.
  • Page 27 AN332 Command 0x80. GPIO_CTL Enables output for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output (Hi-Z or active drive) by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit. The state (high or low) of GPO1, 2, and 3 is set with the GPIO_SET command.
  • Page 28 AN332 Command 0x81. GPIO_SET Sets the output level (high or low) for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit in the GPIO_CTL command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state.
  • Page 29 AN332 5.1.2. FM/RDS Transmitter Properties Property 0x0001. GPO_IEN Configures the sources for the GPO2/INT interrupt pin. Valid sources are the lower 8 bits of the STATUS byte, including CTS, ERR, RDSINT, ASQINT, and STCINT bits. The corresponding bit is set before the interrupt occurs. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 30 AN332 Property 0x0101. DIGITAL_INPUT_FORMAT Configures the digital input format. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: DIGITAL_INPUT_FORMAT is supported in FMTX component 2.0 or higher. Default: 0x0000 D15 D14 Name...
  • Page 31 AN332 Property 0x0103. DIGITAL_INPUT_SAMPLE_RATE Configures the digital input sample rate in 1 Hz units. The input sample rate must be set to 0 before removing the DCLK input or reducing the DCLK frequency below 2 MHz. If this guideline is not followed, a device reset will be required.
  • Page 32 AN332 Property 0x0201. REFCLK_FREQ Sets the frequency of the REFCLK from the output of the prescaler. (Figure 1 shows the relation between RCLK and REFCLK.) The REFCLK range is 31130 to 34406 Hz (32768 ±5% Hz) in 1 Hz steps, or 0 (to disable AFC). For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz REFCLK.
  • Page 33 AN332 Name REFCLKF[15:0] Name Function Frequency of Reference Clock in Hz. 15:0 REFCLKF[15:0] The allowed REFCLK frequency range is between 31130 and 34406 Hz (32768 ±5%), or 0 (to disable AFC). Property 0x0202. REFCLK_PRESCALE Sets the number used by the prescaler to divide the external RCLK down to the internal REFCLK. The range may be between 1 and 4095 in 1 unit steps.
  • Page 34 AN332 Property 0x2100. TX_COMPONENT_ENABLE Individually enables the stereo pilot, left minus right stereo and RDS components. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 35 AN332 Property 0x2102. TX_PILOT_DEVIATION Sets the transmit pilot deviation from 0 to 90 kHz in 10 Hz units. The sum of the audio deviation, pilot deviation and RDS deviation should not exceed regulatory requirements, typically 75 kHz. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 36 AN332 Property 0x2104. TX_LINE_INPUT_LEVEL Sets the input resistance and maximum audio input level for the LIN/RIN pins. An application providing a 150 mV input to the device on RIN/LIN would set Line Attenuation = 00, resulting in a maximum permissible input level of on LIN/RIN and an input resistance of 396 k Ω...
  • Page 37 AN332 Property 0x2105. TX_LINE_INPUT_MUTE Selectively mutes the left and right audio inputs. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Default: 0x0000 D15 D14 D13 D12 D11 D10 Name...
  • Page 38 AN332 Property 0x2107. TX_PILOT_FREQUENCY This property is used to set the frequency of the stereo pilot in 1 Hz steps. The stereo pilot is nominally set to 19 kHz for stereo operation, however the pilot can be set to any frequency from 0 Hz to 19 kHz to support the generation of an audible test tone.
  • Page 39 AN332 Property 0x2201. TX_ACOMP_THRESHOLD Sets the threshold for audio dynamic range control from 0 dBFS to –40 dBFS in 1 dB units in 2's complement notation. For example, a setting of –40 dB would be 65536 – 40 = 65496 = 0xFFD8. The threshold is the level below which the device applies the gain set by the TX_ACOMP_GAIN property, and above which the device applies the compression defined by (gain + threshold) / threshold.
  • Page 40 AN332 Property 0x2202. TX_ACOMP_ATTACK_TIME Sets the time required for the device to respond to audio level transitions from below the threshold in the gain region to above the threshold in the compression region. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 41 AN332 Property 0x2203. TX_ACOMP_RELEASE_TIME Sets the time required for the device to respond to audio level transitions from above the threshold in the compression region to below the threshold in the gain region. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 42 AN332 Property 0x2205. TX_LIMITER_RELEASE_TIME Sets the time required for the device to respond to audio level transitions from above the limiter threshold to below the limiter threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 43 AN332 Property 0x2300. TX_ASQ_INTERRUPT_SELECT This property is used to enable which Audio Signal Quality (ASQ) measurements are returned by the TX_ASQ_STATUS command. Overmodulation of the FM output signal due to excessive input signal level is reported via the OVERMOD bit, which is enabled by setting the OVERMODIEN bit. A high or low input audio condition is reported via the IALH and IALL bits which are enabled by the IALHIEN and IALLIEN bits.
  • Page 44 AN332 Property 0x2301. TX_ASQ_LEVEL_LOW This property sets the low audio level threshold relative to 0 dBFS in 1 dB increments, which is used to trigger the IALL bit. This threshold can be set to detect a silence condition in the input audio allowing the host to take an appropriate action such as disabling the RF carrier or powering down the chip.
  • Page 45 AN332 Property 0x2303. TX_ASQ_LEVEL_HIGH This property sets the high audio level threshold relative to 0 dBFS in 1 dB increments, which is used to trigger the IALH bit. This threshold can be set to detect an activity condition in the input audio allowing the host to take an appropriate action such as enabling the RF carrier after an extended silent period.
  • Page 46 AN332 Name IALHDUR[15:0] Name Function Input Audio Level Duration High. 15:0 IALHDUR[15:0] Required duration the input audio level must exceed IALHTH to trigger an IALH inter- rupt. Specified in 1 ms increments (0 – 65535 ms). Default is 0. Property 0x2C00. TX_RDS_INTERRUPT_SOURCE (Si4711/13/21 only) Configures the RDS interrupt sources.
  • Page 47 AN332 Property 0x2C01. TX_RDS_PI (Si4711/13/21 Only) Sets the RDS PI code to be transmitted in block A and block C (for type B groups). The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 48 AN332 Property 0x2C03. TX_RDS_PS_MISC (Si4711/13/21 Only) Configures miscellaneous RDS flags. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_PS_MISC is supported in FMTX component 2.0 or higher. Default: 0x1008 D9 D8 D7 D6 D5 D2 D1 D0...
  • Page 49 AN332 Property 0x2C04. TX_RDS_PS_REPEAT_COUNT (Si4711/13/21 Only) Sets the number of times a program service group 0A is repeated. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_PS_REPEAT_COUNT is supported in FMTX component 2.0 or higher.
  • Page 50 AN332 Property 0x2C06. TX_RDS_PS_AF (Si4711/13/21 Only) Sets the AF RDS Program Service Alternate Frequency. This provides the ability to inform the receiver of a single alternate frequency using AF Method A coding and is transmitted along with the RDS_PS Groups. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 51 AN332 Property 0x2C07. TX_RDS_FIFO_SIZE (Si4711/13/21 Only) Sets the RDS FIFO size in number of blocks. Note that the value written must be one larger than the desired FIFO size. The number of blocks allocated will reduce the size of the Circular RDS Group Buffer by the same amount. For instance, if RDSFIFOSZ = 20, then the RDS Circular Buffer will be reduced by 20 blocks.

  • Page 52: Commands And Properties For The Fm/Rds Receiver (Si4704/05/06/2X/3X/4X)

    AN332 5.2. Commands and Properties for the FM/RDS Receiver (Si4704/05/06/2x/3x/4x) Tables 8 and 9 summarize the commands and properties for the FM/RDS Receiver component applicable to Si4704/05/06/2x/3x/4x. Table 8. FM/RDS Receiver Command Summary Name Description 0x01 POWER_UP Power up device and mode selection. 0x10 GET_REV Returns revision information on the device.
  • Page 53 AN332 Table 9. FM/RDS Receiver Property Summary (Continued) Prop Name Description Default Sets frequency of reference clock in Hz. The range is 31130 to 0x0201 REFCLK_FREQ 0x8000 34406 Hz, or 0 to disable the AFC. Default is 32768 Hz. 0x0202 REFCLK_PRESCALE Sets the prescaler value for RCLK input.
  • Page 54 AN332 Table 9. FM/RDS Receiver Property Summary (Continued) Prop Name Description Default FM_SEEK_BAND_ Sets the bottom of the FM band for seek. 0x1400 0x222E BOTTOM Default is 8750 (87.5 MHz). Sets the top of the FM band for seek. 0x1401 FM_SEEK_BAND_TOP 0x2A26 Default is 10790 (107.9 MHz).
  • Page 55 AN332 Table 9. FM/RDS Receiver Property Summary (Continued) Prop Name Description Default Sets the stereo to mono attack rate for SNR based blend. Smaller FM_BLEND_SNR_ATTACK values provide slower attack and larger values provide faster 0x1806 0x03E8 _RATE attack. The default is 1000 (approximately 33 ms for 63% change).
  • Page 56 AN332 Table 10. Status Response for the FM/RDS Receiver STATUS RSQINT RDSINT STCINT Name Function Clear to Send. 0 = Wait before sending next command. 1 = Clear to send next command. Error . 0 = No error 1 = Error Reserved Values may vary.
  • Page 57 AN332 5.2.1. FM/RDS Receiver Commands Command 0x01. POWER_UP Initiates the boot process to move the device from powerdown to powerup mode. The boot can occur from internal device memory or a system controller downloaded patch. To confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the POWER_UP command with FUNC = 15 (query library ID).
  • Page 58 AN332 Function. 0 = FM Receive. FUNC[3:0] 1–14 = Reserved. 15 = Query Library ID. Application Setting. 00000101 = Analog audio outputs (LOUT/ROUT). 10110000 = Digital audio outputs (DCLK, DFS, DIO) (Si4705/21/31/35/37/39 OPMODE[7:0] component 2.0 or higher with XOSCEN = 0). 10110101 = Analog and digital audio outputs (LOUT/ROUT and DCLK, DFS, DIO) (Si4705/21/31/35/37/39 component 2.0 or higher with XOSCEN = 0).
  • Page 59 AN332 Command 0x10. GET_REV Returns the part number, chip revision, firmware revision, patch revision and component revision numbers. The command is complete when the CTS bit (and optional interrupt) is set. This command may only be sent when in powerup mode. Command arguments: None Response bytes: Eight Command...
  • Page 60 AN332 Command 0x11. POWER _ DOWN Moves the device from powerup to powerdown mode. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note that only the POWER_UP command is accepted in powerdown mode.
  • Page 61 AN332 Name Function Reserved Always write to 0. Property High Byte. PROP [7:0] This byte in combination with PROP is used to specify the property to modify. Property Low Byte. PROP [7:0] This byte in combination with PROP is used to specify the property to modify. Property Value High Byte.
  • Page 62 AN332 Response STATUS RSQINT RDSINT STCINT RESP1 RESP2 PROPD [7:0] RESP3 PROPD [7:0] RESP Name Function Reserved Always returns 0. Property Value High Byte. PROPD [7:0] This byte in combination with PROPD represents the requested property value. Property Value High Byte. PROPD [7:0] This byte in combination with PROPD...
  • Page 63 AN332 Command 0x20. FM_TUNE_FREQ Sets the FM Receive to tune a frequency between 64 and 108 MHz in 10 kHz units. The CTS bit (and optional interrupt) is set when it is safe to send the next command. The ERR bit (and optional interrupt) is set if an invalid argument is sent.
  • Page 64 AN332 Command 0x21. FM_SEEK_START Begins searching for a valid frequency. Clears any pending STCINT or RSQINT interrupt status. The CTS bit (and optional interrupt) is set when it is safe to send the next command. The ERR bit (and optional interrupt) is set if an invalid argument is sent.
  • Page 65 AN332 Command 0x22. FM_TUNE_STATUS Returns the status of FM_TUNE_FREQ or FM_SEEK_START commands. The commands returns the current frequency, RSSI, SNR, and the antenna tuning capacitance value (0-191). The command clears the STCINT interrupt bit when INTACK bit of ARG1 is set. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 66 AN332 RESP Name Function Band Limit. BLTF Reports if a seek hit the band limit (WRAP = 0 in FM_START_SEEK) or wrapped to the original frequency (WRAP = 1). Reserved Always returns 0. AFC Rail Indicator. AFCRL Set if the AFC rails. Valid Channel.
  • Page 67 AN332 Command 0x23. FM_RSQ_STATUS Returns status information about the received signal quality. The commands returns the RSSI, SNR, frequency offset, and stereo blend percentage. It also indicates valid channel (VALID), soft mute engagement (SMUTE), and AFC rail status (AFCRL). This command can be used to check if the received signal is above the RSSI high threshold as reported by RSSIHINT, or below the RSSI low threshold as reported by RSSILINT.
  • Page 68 AN332 Response STATUS RSQINT RDSINT STCINT RESP1 BLENDINT MULTHINT MULTLINT SNRHINT SNRLINT RSSIHINT RSSIILINT RESP2 SMUTE AFCRL VALID RESP3 PILOT STBLEND[6:0] RESP4 RSSI[7:0] SNR[7:0] RESP5 RESP6 MULT[7:0] RESP7 FREQOFF[7:0] RESP Name Function Blend Detect Interrupt. BLENDINT 0 = Blend is within the Blend threshold settings. 1 = Blend goes above or below the Blend threshold settings.
  • Page 69 AN332 Received Signal Strength Indicator. RSSI[7:0] Contains the current receive signal strength (0–127 dBµV). SNR. SNR[7:0] Contains the current SNR metric (0–127 dB). Multipath (Si4706/40/41/49 Only). MULT[7:0] Contains the current multipath metric. (50 = no multipath; 0 = full multipath) Frequency Offset.
  • Page 70 AN332 Command 0x24. FM_RDS_STATUS (Si4705/06/21/31/35/37/29/41/49 Only) Returns RDS information for current channel and reads an entry from the RDS FIFO. RDS information includes synch status, FIFO status, group data (blocks A, B, C, and D), and block errors corrected. This command clears the RDSINT interrupt bit when INTACK bit in ARG1 is set and, if MTFIFO is set, the entire RDS receive FIFO is cleared (FIFO is always cleared during FM_TUNE_FREQ or FM_SEEK_START).
  • Page 71 AN332 RESP4 BLOCKA[15:8] RESP5 BLOCKA[7:0] RESP6 BLOCKB[15:8] RESP7 BLOCKB[7:0] RESP8 BLOCKC[15:8] RESP9 BLOCKC[7:0] RESP10 BLOCKD[15:8] RESP11 BLOCKD[7:0] RESP12 BLEA[1:0] BLEB[1:0] BLEC[1:0] BLED[1:0] RESP Name Function RDS New Block B (Si4707/49 Only). RDSNEWBLOCKB 1 = Valid Block B data has been received. RDS New Block A (Si4707/49 Only).
  • Page 72 AN332 BLOCKB[15:8] RDS Block B. Block B group data from oldest FIFO entry if STATUSONLY is 0. Last valid BLOCKB[7:0] Block B data if STATUSONLY is 1 (Si4706/49 only). BLOCKC[15:8] RDS Block C. Block C group data from oldest FIFO entry. BLOCKC[7:0] BLOCKD[15:8] RDS Block D.
  • Page 73 AN332 READ_RF RESP1 AGCDIS RESP2 READ_LNA_GAIN_INDEX[4:0] RESP Name Function This bit indicates whether the RF AGC is disabled or not READ_RFAGCDIS 0 = RF AGC is enabled 1 = RF AGC is disabled These bits returns the value of the LNA GAIN index 0 = Minimum attenuation (max gain) READ_LNA_GAIN_INDEX 1 –...
  • Page 74 AN332 Command 0x28. FM_AGC_OVERRIDE Overrides AGC setting by disabling the AGC and forcing the LNA to have a certain gain that ranges between 0 (minimum attenuation) and 26 (maximum attenuation). This command may only be sent when in powerup mode. Command arguments: Two Response bytes: None Command...
  • Page 75 AN332 Command 0x80. GPIO_CTL Enables output for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output (Hi-Z or active drive) by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit. The state (high or low) of GPO1, 2, and 3 is set with the GPIO_SET command.
  • Page 76 AN332 Command 0x81. GPIO_SET Sets the output level (high or low) for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit in the GPIO_CTL command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state.
  • Page 77 AN332 5.2.2. FM/RDS Receiver Properties Property 0x0001. GPO_IEN Configures the sources for the GPO2/INT interrupt pin. Valid sources are the lower 8 bits of the STATUS byte, including CTS, ERR, RSQINT, RDSINT (Si4705/06/21/31/35/37/39/41/49 only), and STCINT bits. The corresponding bit is set before the interrupt occurs. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 78 AN332 Seek/Tune Complete Interrupt Enable. STCIEN 0 = No interrupt generated when STCINT is set (default). 1 = Interrupt generated when STCINT is set. Property 0x0102. DIGITAL_OUTPUT_FORMAT (Si4705/06/21/31/35/37/39 Only) Configures the digital audio output format. Configuration options include DCLK edge, data format, force mono, and sample precision.
  • Page 79 AN332 Property 0x0104. DIGITAL_OUTPUT_SAMPLE_RATE (Si4705/06/21/31/35/37/39 Only) Enables digital audio output and configures digital audio output sample rate in samples per second (sps). When DOSR[15:0] is 0, digital audio output is disabled. To enable digital audio output, program DOSR[15:0] with the sample rate in samples per second.
  • Page 80 AN332 Property 0x0201. REFCLK_FREQ Sets the frequency of the REFCLK from the output of the prescaler. The REFCLK range is 31130 to 34406 Hz (32768 ±5% Hz) in 1 Hz steps, or 0 (to disable AFC). For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz REFCLK.
  • Page 81 AN332 Name REFCLKF[15:0] Name Function Frequency of Reference Clock in Hz. 15:0 REFCLKF[15:0] The allowed REFCLK frequency range is between 31130 and 34406 Hz (32768 ±5%), or 0 (to disable AFC). Property 0x0202. REFCLK_PRESCALE Sets the number used by the prescaler to divide the external RCLK down to the internal REFCLK. The range may be between 1 and 4095 in 1 unit steps.
  • Page 82 AN332 Property 0x1100. FM_DEEMPHASIS (Not applicable for Si4749) Sets the FM Receive de-emphasis to 50 or 75 µs. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 75 µs. Default: 0x0002 D15 D14 D13 D12 D11 D10 Name...
  • Page 83 AN332 Property 0x1105. FM_BLEND_STEREO_THRESHOLD (Not applicable for Si4706/40/41/49) Sets RSSI threshold for stereo blend (Full stereo above threshold, blend below threshold). To force stereo, set this to 0. To force mono, set this to 127. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 84 AN332 Property 0x1106. FM_BLEND_MONO_THRESHOLD (Not applicable for Si4706/40/41/49) Sets RSSI threshold for mono blend (Full mono below threshold, blend above threshold). To force stereo, set this to 0. To force mono, set this to 127. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 85 AN332 Property 0x1108. FM_MAX_TUNE_ERROR Sets the maximum freq error allowed before setting the AFC rail indicator (AFCRL). The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 86 AN332 Property 0x1200. FM_RSQ_INT_SOURCE Configures interrupt related to Received Signal Quality metrics. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0. Default: 0x0000 D15 D14 D13 D12 D11 D10 D9 D8 BLEN-...
  • Page 87 AN332 Property 0x1201. FM_RSQ_SNR_HI_THRESHOLD Sets high threshold which triggers the RSQ interrupt if the SNR is above this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 88 AN332 Property 0x1203. FM_RSQ_RSSI_HI_THRESHOLD Sets high threshold which triggers the RSQ interrupt if the RSSI is above this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 89 AN332 Property 0x1205. FM_RSQ_MULTIPATH_HI_THRESHOLD (Si4706/40/41/49 Only) Sets the high threshold which triggers the RSQ interrupt if the Multipath level is above this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in power up mode.
  • Page 90 AN332 Property 0x1207. FM_RSQ_BLEND_THRESHOLD Sets the blend threshold for blend interrupt when boundary is crossed. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 1%.
  • Page 91 AN332 Property 0x1302. FM_SOFT_MUTE_MAX_ATTENUATION (Not applicable for Si4749) Sets maximum attenuation during soft mute (dB). Set to 0 to disable soft mute. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 16 dB.
  • Page 92 AN332 Property 0x1400. FM_SEEK_BAND_BOTTOM Sets the bottom of the FM band for seek. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 87.5 MHz. Default: 0x222E Units: 10 kHz Step: 50 kHz...
  • Page 93 AN332 Property 0x1402. FM_SEEK_FREQ_SPACING Selects frequency spacing for FM seek. There are only 3 valid values: 5, 10, and 20. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 94 AN332 Property 0x1404. FM_SEEK_TUNE_RSSI_THRESHOLD Sets the RSSI threshold for a valid FM Seek/Tune. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 20 dBµV. Default: 0x0014 Units: dBµV Step: 1...
  • Page 95 AN332 Property 0x1501. RDS_INT_FIFO_COUNT (Si4705/06/21/31/35/37/39/41/49 Only) Sets the minimum number of RDS groups stored in the RDS FIFO before RDSRECV is set. The maximum value is 14. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 96 AN332 Property 0x1502. RDS_CONFIG (Si4705/06/21/31/35/37/39/41/49 Only) Configures RDS settings to enable RDS processing (RDSEN) and set RDS block error thresholds. When a RDS Group is received, all block errors must be less than or equal the associated block error threshold for the group to be stored in the RDS FIFO.
  • Page 97 AN332 Property 0x1503. FM_RDS_CONFIDENCE (Si4706/49 Only) Selects the confidence level requirement for each RDS block. A higher confidence requirement will result in fewer decoder errors (% of blocks with BLE<3 that contains incorrect information) but more block errors (% of blocks with BLE=3).
  • Page 98 AN332 D2 D1 Name MONOTHRESH[6:0] Property 0x1802. FM_BLEND_RSSI_ATTACK_RATE (Si4740/41 Only) Sets the stereo to mono attack rate for RSSI based blend. Smaller values provide slower attack and larger values provide faster attack. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 99 AN332 D2 D1 Name STRTHRESH[6:0] Property 0x1805. FM_BLEND_SNR_MONO_THRESHOLD (Si4740/41 Only) Sets SNR threshold for mono blend (Full mono below threshold, blend above threshold). To force stereo, set to 0. To force mono, set to 127. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 100 AN332 D2 D1 Name RELEASE[15:0] Property 0x1808. FM_BLEND_MULTIPATH_STEREO_THRESHOLD (Si4740/41 Only) Sets Multipath threshold for stereo blend (Full stereo above threshold, blend below threshold). To force stereo, set to 0. To force mono, set to 50. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 101 AN332 Property 0x180B. FM_BLEND_MULTIPATH_RELEASE_RATE (Si4740/41 Only) Sets the mono to stereo release rate for Multipath based blend. Smaller values provide slower release and larger values provide faster release. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 102 AN332 Name Function 15:2 Reserved Always write to 0. LMUTE Mutes L Audio Output. RMUTE Mutes R Audio Output. Property 0x4100. RF_AGC_ATTACK_RATE (Si4740/41 Only) Sets the RF AGC attack rate. Larger values provide slower attack and smaller values provide faster attack. The CTS bit (and optional interrupt) is set when it is safe to send the next command.

  • Page 103: Commands And Properties For The Am/Sw/Lw Receiver (Si4730/31/34/35/36/37/40/41)

    AN332 5.3. Commands and Properties for the AM/SW/LW Receiver (Si4730/31/34/35/36/37/40/41) AM (Medium Wave), SW (Short Wave), and LW (Long Wave) use the same AM_SW_LW component, thus the commands and properties for these functions are the same. For simplicity reason, the commands and properties only have a prefix AM instead of AM_SW_LW.
  • Page 104 AN332 Table 13. AM/SW/LW Receiver Property Summary Prop Name Description Default 0x0001 GPO_IEN Enables interrupt sources. 0x0000 DIGITAL_OUTPUT_ 0x0102 Configure digital audio outputs (Si4731/35/37 only) 0x0000 FORMAT DIGITAL_OUTPUT_ 0x0104 Configure digital audio output sample rate (Si4731/35/37 only) 0x0000 SAMPLE_RATE Sets frequency of reference clock in Hz. The range is 31130 to 0x0201 REFCLK_FREQ 0x8000...
  • Page 105 AN332 Table 13. AM/SW/LW Receiver Property Summary (Continued) Prop Name Description Default Sets the RSSI threshold for a valid AM Seek/Tune. If the value is AM_SEEK_RSSI_ 0x3404 zero then RSSI threshold is not considered when doing a seek. 0x0019 THRESHOLD Default value is 25 dBµV.
  • Page 106 AN332 5.3.1. AM/SW/LW Receiver Commands Command 0x01. POWER_UP Initiates the boot process to move the device from powerdown to powerup mode. The boot can occur from internal device memory or a system controller downloaded patch. To confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the POWER_UP command with FUNC = 15 (query library ID).
  • Page 107 AN332 Name Function Function. 0 = Reserved. FUNC[3:0] 1 = AM/SW/LW Receive. 2–14 = Reserved. 15 = Query Library ID. Application Setting 00000101 = Analog audio outputs (LOUT/ROUT). 10110000 = Digital audio outputs (DCLK, DFS, DIO) (Si4731/35/37 only with OPMODE[7:0] XOSCEN = 0).
  • Page 108 AN332 Command 0x10. GET _ REV Returns the part number, chip revision, firmware revision, patch revision and component revision numbers. The command is complete when the CTS bit (and optional interrupt) is set. This command may only be sent when in powerup mode.
  • Page 109 AN332 Command 0x11. POWER _ DOWN Moves the device from powerup to powerdown mode. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note that only the POWER_UP command is accepted in powerdown mode.
  • Page 110 AN332 Name Function Reserved Always write to 0. Property High Byte. PROP [7:0] This byte in combination with PROP is used to specify the property to modify. See Section "5.3.2. AM/SW/LW Receiver Properties" on page 120. Property Low Byte. PROP [7:0] This byte in combination with PROP is used to specify the property to...
  • Page 111 AN332 Response STATUS RSQINT STCINT RESP1 RESP2 PROPD [7:0] RESP3 PROPD [7:0] RESP Name Function Reserved Always returns 0. Property Value High Byte. PROPD [7:0] This byte in combination with PROPD represents the requested property value. Property Value High Byte. PROPD [7:0] This byte in combination with PROPD...
  • Page 112 AN332 Command 0x40. AM _ TUNE _ FREQ Tunes the AM/SW/LW receive to a frequency between 149 and 23 MHz in 1 kHz steps. In AM only mode, the valid frequency is between 520 and 1710 kHz in 1 kHz steps. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 113 AN332 Response STATUS RSQINT STCINT Command 0x41. AM_SEEK_START Initiates a seek for a channel that meets the RSSI and SNR criteria for AM. Clears any pending STCINT or RSQINT interrupt status. The CTS bit (and optional interrupt) is set when it is safe to send the next command. The ERR bit (and optional interrupt) is set if an invalid argument is sent.
  • Page 114 AN332 Command 0x42. AM_TUNE_STATUS Returns the status of AM_TUNE_FREQ or AM_SEEK_START commands. The commands returns the current frequency, RSSI, SNR, and the antenna tuning capacitance value (0–6143). The command clears the STCINT interrupt bit when INTACK bit of ARG1 is set. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 115 AN332 RESP Bit Name Function Band Limit. BLTF Reports if a seek hit the band limit (WRAP = 0 in AM_START_SEEK) or wrapped to the original frequency (WRAP = 1). Reserved Always returns 0. AFC Rail Indicator. AFCRL Set if the AFC rails. Valid Channel.
  • Page 116 AN332 Command 0x43. AM_RSQ_STATUS Returns status information about the received signal quality. The commands returns RSSI and SNR. It also indicates valid channel (VALID), soft mute engagement (SMUTE), and AFC rail status (AFCRL). This command can be used to check if the received signal is above the RSSI high threshold as reported by RSSIHINT, or below the RSSI low threshold as reported by RSSILINT.
  • Page 117 AN332 RESP Name Function SNR Detect High. SNRHINT 0 = Received SNR has not exceeded above SNR high threshold. 1 = Received SNR has exceeded above SNR high threshold. SNR Detect Low. SNRLINT 0 = Received SNR has not exceeded below SNR low threshold. 1 = Received SNR has exceeded below SNR low threshold.
  • Page 118 AN332 Command 0x80. GPIO_CTL Enables output for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output (Hi-Z or active drive) by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit. The state (high or low) of GPO1, 2, and 3 is set with the GPIO_SET command.
  • Page 119 AN332 Command 0x81. GPIO_SET Sets the output level (high or low) for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit in the GPIO_CTL command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state.
  • Page 120 AN332 5.3.2. AM/SW/LW Receiver Properties Property 0x0001. GPO_IEN Configures the sources for the GPO2/INT interrupt pin. Valid sources are the lower 8 bits of the STATUS byte, including CTS, ERR, RSQINT, and STCINT bits. The corresponding bit is set before the interrupt occurs. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 121 AN332 Property 0x0102. DIGITAL_OUTPUT_FORMAT (Si4731/35/37 Only) Configures the digital audio output format. Configuration options include DCLK edge, data format, force mono, and sample precision. Note: DIGITAL_OUTPUT_FORMAT is supported in AM_SW_LW receive component 2.0 or higher. Default: 0x0000 Name OFALL OMODE[3:0] OSIZE[1:0] Name Function...
  • Page 122 AN332 Property 0x0201. REFCLK_FREQ Sets the frequency of the REFCLK from the output of the prescaler. The REFCLK range is 31130 to 34406 Hz (32768 ±5% Hz) in 1 Hz steps, or 0 (to disable AFC). For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz REFCLK.
  • Page 123 AN332 Property 0x0202. REFCLK_PRESCALE Sets the number used by the prescaler to divide the external RCLK down to the internal REFCLK. The range may be between 1 and 4095 in 1 unit steps. For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz.
  • Page 124 AN332 Property 0x3102. AM_CHANNEL_FILTER Selects the bandwidth of the AM channel filter. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 2 kHz bandwidth channel filter.
  • Page 125 AN332 Property 0x3200. AM_RSQ_INT_SOURCE Configures interrupt related to Received Signal Quality metrics. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Default: 0x0000 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 Name...
  • Page 126 AN332 Property 0x3202. AM_RSQ_SNR_LO_THRESHOLD Sets low threshold which triggers the RSQ interrupt if the SNR is below this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 127 AN332 Property 0x3204. AM_RSQ_RSSI_LO_THRESHOLD Sets low threshold which triggers the RSQ interrupt if the RSSI is below this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 128 AN332 Property 0x3301. AM_SOFT_MUTE_SLOPE Configures attenuation slope during soft mute in dB attenuation per dB SNR below the soft mute SNR threshold. Soft mute attenuation is the minimum of SMSLOPE x (SMTHR – SNR) and SMATTN. The recommended SMSLOPE value CEILING(SMATTN/SMTHR).
  • Page 129 AN332 Property 0x3303. AM_SOFT_MUTE_SNR_THRESHOLD Sets the SNR threshold to engage soft mute. Whenever the SNR for a tuned frequency drops below this threshold the AM reception will go in soft mute, provided soft mute max attenuation property is non-zero. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 130 AN332 Property 0x3400. AM_SEEK_BAND_BOTTOM Sets the lower boundary for the AM band in kHz. This value is used to determine when the lower end of the AM band is reached when performing a seek. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 131 AN332 Property 0x3401. AM_SEEK_BAND_TOP Sets the upper boundary for the AM band in kHz. This value is used to determine when the higher end of the AM band is reached when performing a seek. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 132 AN332 Property 0x3402. AM_SEEK_FREQ_SPACING Sets the frequency spacing for the AM Band when performing a seek. The frequency spacing determines how far the next tune is going to be from the currently tuned frequency. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 133 AN332 Property 0x3403. AM_SEEK_TUNE_SNR_THRESHOLD Sets the SNR threshold for a valid AM Seek/Tune. If the value is zero, then SNR is not used as a valid criteria when doing a seek for AM. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 134 AN332 Property 0x3404. AM_SEEK_TUNE_RSSI_THRESHOLD Sets the RSSI threshold for a valid AM Seek/Tune. If the value is zero then RSSI is not used as a valid criteria when doing a seek for AM. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 135 AN332 Property 0x4001. RX_HARD_MUTE Mutes the audio output. L and R audio outputs may not be muted independently. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.

  • Page 136: Commands And Properties For The Wb Receiver (Si4707/36/37/38/39)

    AN332 5.4. Commands and Properties for the WB Receiver (Si4707/36/37/38/39) The following two tables are the summary of the commands and properties for the Weather Band Receiver component applicable to Si4707/36/37/38/39. Table 16. WB Receiver Command Summary Name Description 0x01 POWER_UP Power up device and mode selection.
  • Page 137 AN332 Table 17. WB Receive Property Summary Prop Name Description Default 0x0001 GPO_IEN Enables interrupt sources. 0x0000 Sets frequency of reference clock in Hz. The range 0x0201 REFCLK_FREQ is 31130 to 34406 Hz, or 0 to disable the AFC. 0x8000 Default is 32768 Hz.
  • Page 138 AN332 Table 18. Status Response for the WB Receiver STATUS RSQINT SAMEINT ASQINT STCINT Name Function Clear to Send. 0 = Wait before sending next command. 1 = Clear to send next command. Error. 0 = No error 1 = Error Reserved Values may vary.
  • Page 139 AN332 5.4.1. WB Receiver Commands Command 0x01. POWER_UP Initiates the boot process to move the device from powerdown to powerup mode. The boot can occur from internal device memory or a system controller downloaded patch. To confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the POWER_UP command with FUNC = 15 (query library ID).
  • Page 140 AN332 Name Function CTSIEN CTS Interrupt Enable. 0 = CTS interrupt disabled. 1 = CTS interrupt enabled. GPO2OEN GPO2 Output Enable. 0 = GPO2 output disabled. 1 = GPO2 output enabled. PATCH Patch Enable. 0 = Boot normally 1 = Copy NVM to RAM, but do not boot. After CTS has been set, RAM may be patched XOSCEN Crystal Oscillator Enable.
  • Page 141 AN332 Response (FUNC = 3, WB Receive) STATUS RSQINT SAMEINT ASQINT STCINT Response (FUNC = 15, Query Library ID) STATUS RSQINT SAMEINT ASQINT STCINT RESP1 PN[7:0] RESP2 FWMAJOR[7:0] RESP3 FWMINOR[7:0] RESP4 RESERVED[7:0] RESP5 RESERVED[7:0] RESP6 CHIPREV[7:0] RESP7 LIBRARYID[7:0] RESP Name Function PN[7:0] Final 2 digits of part number (HEX).
  • Page 142 AN332 Response STATUS RSQINT SAMEINT ASQINT STCINT RESP1 PN[7:0] RESP2 FWMAJOR[7:0] FWMINOR[7:0] RESP3 RESP4 PATCH [7:0] RESP5 PATCH [7:0] RESP6 CMPMAJOR[7:0] RESP7 CMPMINOR[7:0] RESP8 CHIPREV[7:0] RESP Name Function PN[7:0] Final 2 digits of Part Number FWMAJOR[7:0] Firmware Major Revision FWMINOR[7:0] Firmware Minor Revision PATCH [7:0]...
  • Page 143 AN332 Command 0x11. POWER_DOWN Moves the device form powerup to powerdown mode. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note that only the POWER_UP command is accepted in powerdown mode.
  • Page 144 AN332 Name Function Reserved Always write to 0. PROP [7:0] Property High Byte. This byte in combination with PROP is used to specify the property to modify. PROP [7:0] Property Low Byte. This byte in combination with PROP is used to specify the property to modify.
  • Page 145 AN332 Response STATUS RSQINT SAMEINT ASQINT STCINT RESP1 PROPV [7:0] RESP2 PROPV [7:0] RESP3 RESP Name Function Reserved Always returns 0. PROPV [7:0] Property Value High Byte. This byte in combination with PROPV will represent the requested property value. PROPV [7:0] Property Value High Byte.
  • Page 146 AN332 Command 0x50. WB_TUNE_FREQ Sets the WB Receive to tune the frequency between 162.4MHz and 162.55MHz in 2.5kHz units. For example 162.4MHz MHz = 64960 and 162.55MHz = 65020. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 147 AN332 Command 0x52. WB_TUNE_STATUS Returns the status of WB_TUNE_FREQ. The commands returns the current frequency, and RSSI/SNR at the moment of tune. The command clears the STCINT interrupt bit when INTACK bit of ARG1 is set. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 148 AN332 Data Name Function Reserved Always returns 0. AFCRL AFC Rail Indicator. This bit will be set if the AFC rails. VALID Valid Channel. Confirms if the tuned channel is currently valid. READFREQ [7:0] Read Frequency High Byte. This byte in combination with READFREQ returns frequency being tuned.
  • Page 149 AN332 Response STATUS RSQINT SAMEINT ASQINT STCINT RESP1 SNRHI SNRLINT RSSIHI RSSIILINT RESP2 AFCRL VALID RESP3 RSSI[7:0] RESP4 RESP5 ASNR[7:0] RESP6 FREQOFF[7:0] RESP7 Data Name Function SNRHINT SNR Detect High. 0 = Received SNR has not exceeded above SNR high threshold. 1 = Received SNR has exceeded above SNR high threshold.
  • Page 150 AN332 Command 0x54. WB_SAME_STATUS (Si4707 Only) Retrieves SAME information, acknowledges SAMEINT interrupts and clears the message buffer. The command indicates whether the start of message, end of message or preamble is detected and if the header buffer is ready. The state of the decoder, message length, and 8 bytes of the message buffer with corresponding confidence level is returned.
  • Page 151 AN332 Response STATUS RSQINT SAMEINT ASQINT STCINT RESP1 EOMDET SOMDET PREDET HDRRDY RESP2 STATE[7:0] RESP3 MSGLEN[7:0] RESP4 CONF7[1:0] CONF6[1:0] CONF5[1:0] CONF4[1:0] RESP5 CONF3[1:0] CONF2[1:0] CONF1[1:0] CONF0[1:0] RESP6 DATA0[7:0] RESP7 DATA1[7:0] RESP8 DATA2[7:0] RESP9 DATA3[7:0] RESP10 DATA4[7:0] RESP11 DATA5[7:0] RESP12 DATA6[7:0] RESP13 DATA7[7:0] RESP...
  • Page 152 AN332 RESP Name Function Confidence Metric for DATA7 represented as a number between 0 [7:6] CONF7[1:0] (low) and 3 (high). Confidence Metric for DATA6 represented as a number between 0 [5:4] CONF6[1:0] (low) and 3 (high). Confidence Metric for DATA5 represented as a number between 0 [3:2] CONF5[1:0] (low) and 3 (high).
  • Page 153 AN332 Command 0x55. WB_ASQ_STATUS Returns status information about the 1050kHz alert tone in Weather Band. The commands returns the alert on/off Interrupt and the present state of the alert tone. The command clears the ASQINT bit when INTACK bit of ARG1 is set.
  • Page 154 AN332 Command 0x57. WB_AGC_STATUS Returns the AGC setting of the device. The command returns whether the AGC is enabled or disabled. This command may only be sent when in powerup mode. Command arguments: None Response bytes: One Command Response STATUS RSQINT SAMEINT ASQINT...
  • Page 155 AN332 Command 0x58. WB_AGC_OVERRIDE Overrides AGC setting by disabling the AGC and forcing the LNA to have a certain gain that ranges between 0 (minimum attenuation) and 26 (maximum attenuation). This command may only be sent when in powerup mode. Command arguments: One Response bytes: None Command...
  • Page 156 AN332 Command 0x80. GPIO_CTL Enables output for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output (Hi-Z or active drive) by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit. The state (high or low) of GPO1, 2, and 3 is set with the GPIO_SET command.
  • Page 157 AN332 Command 0x81. GPIO_SET Sets the output level (high or low) for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit in the GPIO_CTL command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state.
  • Page 158 AN332 5.4.2. WB Receiver Properties Property 0x0001. GPO_IEN Configures the sources for the GPO2/IRQ interrupt pin. Valid sources are the lower 8 bits of the STATUS byte, including CTS, ERR, RSQINT, SAMEINT (Si4707 only), ASQINT, and STCINT bits. The corresponding bit is set before the interrupt occurs.
  • Page 159 AN332 SAME Interrupt Enable (Si4707 Only). SAMEIEN 0 = No interrupt generated when SAMEINT is set (default). 1 = Interrupt generated when SAMEINT is set. ASQ Interrupt Enable ASQIEN 0 = No interrupt generated when ASQINT is set (default) 1 = Interrupt generated when ASQINT is set Seek/Tune Complete Interrupt Enable.
  • Page 160 AN332 Step: 1Hz Range: 31130-34406 Name REFCLKF[15:0] Name Function 15:0 REFCLKF[15:0] Frequency of Reference Clock in Hz. The allowed REFCLK frequency range is between 31130 and 34406 Hz (32768 5%), or 0 (to disable AFC). Property 0x0202. REFCLK_PRESCALE Sets the number used by the prescaler to divide the external RCLK down to the internal REFCLK. The range may be between 1 and 1023 in 1 unit steps.
  • Page 161 AN332 Property 0x5108. WB_MAX_TUNE_ERROR Sets the maximum freq error allowed before setting the AFC_RAIL indicator.The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 10 kHz.
  • Page 162 AN332 Name Function SNRHIEN Interrupt Source Enable: Audio SNR High. Enable SNR high as the source of interrupt which the threshold is set by WB_RSQ_SNR_HI_THRESHOLD. SNRLIEN Interrupt Source Enable: Audio SNR Low. Enable SNR low as the as the source of interrupt which the threshold is set by WB_RSQ_SNR_LO_THRESHOLD.
  • Page 163 AN332 Property 0x5202. WB_RSQ_SNR_LO_THRESHOLD Sets low threshold which will trigger the RSQ interrupt if the Audio SNR is below this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 164 AN332 Property 0x5204. WB_RSQ_RSSI_LO_THRESHOLD Sets low threshold which will trigger the RSQ interrupt if the RSSI is below this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 165 AN332 Property 0x5404. WB_VALID_RSSI_THRESHOLD Sets the RSSI threshold which the WB_RSQ_STATUS and WB_TUNE_STATUS will consider the channel valid if the received RSSI is at or above this value. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 166 AN332 Property 0x5600. WB_ASQ_INT_SOURCE Configures interrupt related to the 1050kHz alert tone. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0. Default: 0x0000 Name Name...
  • Page 167 AN332 Property 0x4001. RX_HARD_MUTE Mutes the audio output. L and R audio outputs may not be muted independently. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.

  • Page 168: Control Interface

    AN332 6. Control Interface The bus mode is selected by sampling the state of the GPO1 and GPO2/INT pins on the rising edge of RST. The GPO1 pin includes a 1 M Ω internal pull-up resistor that is connected while RST is low, and the GPO2/INT pin includes an internal 1 M Ω...
  • Page 169 AN332 SCLK A6-A0, D7-D0 D7-D0 SDIO START ADDRESS + R/W DATA DATA STOP Figure 6. 2-wire Control Interface Read and Write Timing Diagram 2-wire bus mode uses only the SCLK and SDIO pins for signaling. A transaction begins with the START condition, which occurs when SDIO falls while SCLK is high.
  • Page 170 AN332 ACK = 0. The system controller then sends the CMD byte, 0x30, and again the device acknowledges by setting ACK = 0. The system controller and device repeat this process for the ARG1, ARG2, and ARG3 bytes. Commands may take up to seven argument bytes, and this flexibility should be designed into the 2-wire bus mode implementation.

  • Page 171: 3-Wire Control Interface Mode

    AN332 6.2. 3-Wire Control Interface Mode Figures 7 and 8 show the 3-wire Control Interface Read and Write Timing Parameters and Diagrams, respectively. Refer to the Si471x data sheet for timing parameter values. SCLK HSDIO HIGH HSEN A6-A5, SDIO R/W, D14-D1 A4-A1 Address In...
  • Page 172 AN332 Table 22. Register Map for 3-Wire Mode Name D15 D14 D13 D12 D11 D7 D6 D5 D4 D3 D2 D1 D0 Addr COMMAND1 ARG1 COMMAND2 ARG2 ARG3 COMMAND3 ARG4 ARG5 COMMAND4 ARG6 ARG7 Reserved1 Reserved Reserved Reserved2 Reserved Reserved Reserved3 Reserved Reserved...
  • Page 173 AN332 To send the TX_TUNE_FREQ command and arguments, the system controller sets SEN = 0. Next, the controller drives the 9-bit control word on SDIO, consisting of the device address (A7:A5 = 101b), the write bit (0b), the device address (A4 = 0), and the register address for the COMMAND2 register (A3:A0 = 0001b). The control word is followed by a 16-bit data word, consisting of ARG2 followed by ARG3.

  • Page 174: Spi Control Interface Mode

    AN332 6.3. SPI Control Interface Mode Figures 9 and 10 show the SPI Control Interface Read and Write Timing Parameters and Diagrams, respectively. Refer to the Si471x data sheet for timing parameter values. SCLK HIGH HSDIO HSEN SDIO C6–C1 D6–D1 Control Byte In 8 Data Bytes In Figure 9.
  • Page 175 AN332 For read operations, the controller must read exactly one byte (STATUS) after the control byte or exactly 16 data bytes (STATUS and RESP1–RESP15) after the control byte. The device changes the state of SDIO (or GPO1, if specified) on the falling edge of SCLK. Data must be captured by the system controller on the rising edge of SCLK. Keep SEN low until all bytes have transferred.

  • Page 176: Powerup

    AN332 7. Powerup There are two procedures for booting the device to move it from powerdown mode to the powerup mode. The first and most common is a boot from internal device memory. The second is a boot from a firmware patch that is written from the system controller to the device.

  • Page 177: Powerup From Device Memory

    AN332 7.1. Powerup from Device Memory Table 25. Using the POWER_UP Command for the FM Transmitter Action Data Description 0x01 POWER_UP ARG1 0x02 Set to FM Transmit. ARG2 0x50 Set to Analog Line Input. → RESP1 0x80 Reply Status. Clear-to-send high. 1.

  • Page 178: Powerup From A Component Patch

    In order to support interim updates to the device component, patches can be applied to the component by the system controller via a download mechanism. Patches can be provided by Silicon Laboratories to customers to address field issues, errata, or adjust device behavior. Patches are unique to a particular device firmware version and cannot be generated by customers.
  • Page 179 AN332 Table 32. Si4730/31 Firmware, Library, and Component Compatibility Firmware Library FMRX Component AM_SW_LW RX Part # Component Si4730-A10 Si4730/31-B20 Table 33. Si4734/35 Firmware, Library, and Component Compatibility Part # Firmware Library FMRX Component AM_SW_LW Component Si4734/35-B20 Table 34. Si4736/37 Firmware, Library, and Component Compatibility Part # Firmware Library...
  • Page 180 ERR (bit 6 of the one byte reply that is available after each 8-byte transfer), and halts. The part must be reset to recover from this error condition. The following is an example of a patch file. # Copyright 2006 Silicon Laboratories, Inc. # Patch generated 21:09 August 09 2006 # fmtx version 0.0 alpha...
  • Page 181 AN332 Table 38. Example POWER_UP Command with Patching Enabled Action Data Description 0x01 POWER_UP ARG1 0xCF Set to Read Library ID, Enable Interrupts. ARG2 0x50 Set to Analog Line Input. → STATUS 0x80 Reply Status. Clear-to-send high. → RESP1 0x0D Part Number, HEX (0x0D = Si4713) →...

  • Page 182: Powerdown

    AN332 8. Powerdown The procedure for moving the device from powerup to powerdown modes requires writing the POWER_DOWN command. Table 39. Using the POWER_DOWN command Action Data Description 0x11 POWER_DOWN → STATUS 0x80 Reply Status. Clear-to-send high. To Power Down the device and remove VDD and VIO (optional): 1.

  • Page 183: Digital Audio Interface

    AN332 9. Digital Audio Interface The digital audio interface operates in slave mode and supports 3 different audio data formats: Left-Justified DSP Mode In I S mode, the MSB is captured on the second rising edge of DCLK following each DFS transition. The remaining bits of the word are sent in order down to the LSB.
  • Page 184 AN332 There are two additional properties each for FM Transmitter and AM/FM/SW/LW Receiver associated with using digital audio input/output. Note that digital audio is not supported in WB Receiver. For FM Transmitter: 1. Property 0x0101: DIGITAL_INPUT_FORMAT 2. Property 0x0103: DIGITAL_INPUT_SAMPLE_RATE For AM/FM/SW/LW Receiver: 1.
  • Page 185 AN332 Table 40. Digital Audio Programming Example 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x01 DIGITAL_INPUT_FORMAT or ARG3 (PROP) 0x01 or 0x02 DIGITAL_OUTPUT_FORMAT ARG4 (PROPD) 0x00 Mode: I2S, stereo, 16bit, sample on rising edge of DCLK ARG5 (PROPD) 0x00 STATUS →0x80 Reply Status.

  • Page 186: Timing

    AN332 10. Timing There are two indicators: CTS (Clear to Send) and STC (Seek/Tune Complete) to indicate that a command has been accepted and execution completed by the part. After sending every command, the CTS bit will be set indicating that the command has been accepted by the part and it is ready to receive the next command.
  • Page 187 AN332 Control COMMAND GPO2/ Figure 17. CTS and STC Timing Model The SET_PROPERTY command does not have an indicator telling when the command has completed execution, rather the timing is guaranteed and it is called t . The CTS and SET_PROPERTY command completion timing COMP model t is shown in Figure 18 and the timing parameters for each command are shown in Table 41.
  • Page 188 AN332 Table 41. Command Timing Parameters for the FM Transmitter Command COMP POWER_UP 110 ms — — POWER_DOWN — — GET_REV — — GET_PROPERTY — — GET_INT_STATUS TX_ASQ_STATUS — — TX_RDS_BUFF — — TX_RDS_PS — — 1 µs 300 µs TX_TUNE_STATUS —...
  • Page 189 AN332 Table 42. Command Timing Parameters for the FM Receiver *Note: t is seek time per channel. Total seek time depends on bandwidth, channel spacing, and number of channels to next valid channel. Worst case seek time complete for FM_SEEK_START is: FM_SEEK_BAND_TOP FM_SEEK_BAND_BOTTOM –...
  • Page 190 AN332 Table 44. Command Timing Parameters for the WB Receiver Command COMP POWER_UP 110 ms — — POWER_DOWN — — GET_REV — — GET_PROPERTY — — GET_INT_STATUS WB_RSQ_STATUS — — WB_SAME_STATUS — — WB_ASQ_STATUS — — 1 µs 300 µs WB_TUNE_STATUS —...

  • Page 191: Fm Transmitter

    AN332 11. FM Transmitter The FM Transmitter audio signal chain involves Audio Dynamic Range Control, Pre-emphasis and Limiter function. Understanding what these three function blocks do in the signal chain will help user in maximizing the volume out of the FM Transmitter. 11.1.

  • Page 192: Audio Pre-Emphasis For Fm Transmitter

    AN332 Threshold Audio Input Audio Output Attack Release time time Figure 20. Time Domain Characteristics of the Audio Dynamic Range Controller 11.2. Audio Pre-emphasis for FM Transmitter Pre-emphasis and de-emphasis are techniques used to improve the signal-to-noise ratio of an FM stereo broadcast by reducing the effects of high-frequency noise.

  • Page 193: Audio Limiter For Fm Transmitter

    AN332 11.3. Audio Limiter for FM Transmitter A limiter is available to prevent overmodulation by dynamically attenuating the audio level such that the maximum audio deviation does not exceed the level set by the TX_AUDIO_DEVIATION property. The limiter is useful when trying to maximize the audio volume, minimize receiver-generated distortion and prevent overmodulation that may result in violating FCC and ETSI modulation limits.
  • Page 194 AN332 The audio deviation should be set as high as possible, with the constraint that the sum of the audio, pilot and RDS deviation must be 75 kHz or less. Typical settings are 66.25 kHz audio deviation, 6.75 kHz pilot deviation and 2 kHz RDS deviation.

  • Page 195: Programming Examples

    AN332 12. Programming Examples This section contains the programming example for each of the function: FM Transmit, FM Receive, AM/SW/LW Receive, and WB Receive. Before each of the example, an overview of how to program the device is shown as a flowchart.
  • Page 196 AN332 Use all default Set FM Transmit Frequency Settings? (command 0x30) Set Transmit Power (command 0x31) Set INT settings Use Interrupt? (property 0x0001) CHIP STATE: TRANSMITTING Set GPO Use GPO? (command 0x80, 0x81) Set RCLK settings (property 0x0201, 0x0202) Analog/Digital Digital Set audio format Audio Input?
  • Page 197 AN332 Set Pilot Deviation & Freq Stereo Mono/Stereo? (property 0x2102, 0x2107) Mono Disable Stereo components Enable Stereo components (property 0x2100) (property 0x2100) Set Audio Deviation (property 0x2101) Transmit RDS? Set RDS Deviation (Si4711/13/21 only) (property 0x2103) Disable RDS components Enable RDS components (property 0x2100) (property 0x2100) Set RDS properties...
  • Page 198 AN332 Enable Preemphasis Preemphasis? (property 0x2106) Disable Preemphasis (property 0x2106 = 2) Enable Compressor Settings Compressor? (property 0x2200-04) Disable Compressor (property 0x2200) Enable Limiter Settings Limiter? (property 0x2200, 05) Disable Limiter (property 0x2200) Set FM Transmit Frequency (command 0x30) Set Transmit Power (command 0x31) CHIP STATE: TRANSMITTING...
  • Page 199 AN332 Monitor Audio Signal Set ASQ settings Quality (ASQ)? (property 0x2300 - 0x2304) Query TX_ASQ_STATUS (command 0x34) Optional: Mute or Unmute Audio based on ASQ status (property 0x2105) Want to find an empty channel Send TX_TUNE_MEASURE LOOP from start_freq to Using RPS? (command 0x32) end_freq until DONE...
  • Page 200 AN332 Need to change Disable digital audio by DCLK/DFS setting DFS sample rate to 0 Rate? (property 0x0103) (digital only) Change DCLK/DFS rate or Disable DCLK/DFS DCLK/DFS has been changed or re-enabled Enable digital audio by setting DFS sample rate (property 0x0103) Change Chip Send POWER_DOWN...
  • Page 201 AN332 Table 46. Programming Example for the FM/RDS Transmitter Action Data Description Powerup in Digital Mode 0x01 POWER_UP (See Table 28 for patching procedure) ARG1 0xC2 Set to FM Transmit. Enable interrupts. ARG2 0x0F Set to Digital Audio Input STATUS →0x80 Reply Status.
  • Page 202 AN332 Table 46. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description Configuration 0x10 GET_REV ARG1 0x00 → STATUS 0x80 Reply Status. Clear-to-send high. → RESP1 0x0D Part Number, HEX (0x0D = Si4713) → RESP2 0x32 Firmware Major Rev, ASCII (0x32 = 2) →...
  • Page 203 AN332 Table 46. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x21 TX_PREEMPHASIS ARG3 (PROP) 0x06 ARG4 (PROPD) 0x00 50 µs ARG5 (PROPD) 0x01 → STATUS 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1 0x00...
  • Page 204 AN332 Table 46. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x33 TX_TUNE_STATUS ARG1 0x01 Clear STC interrupt. → STATUS 0x80 Reply Status. Clear-to-send high. → RESP1 0x00 → RESP2 0x27 Frequency = 0x277E = 10110d = 101.1 MHz →...
  • Page 205 AN332 Table 46. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x22 TX_ACOMP_ENABLE ARG3 (PROP) 0x00 ARG4 (PROPD) 0x00 Enable the limiter and compressor. ARG5 (PROPD) 0x03 → STATUS 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1...
  • Page 206 AN332 Table 46. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x23 TX_ASQ_INTERRUPT_SELECT ARG3 (PROP) 0x00 ARG4 (PROPD) 0x00 ARG5 (PROPD) 0x07 Enable overmodulation, high and low thresholds. → STATUS 0x80 Reply Status. Clear-to-send high. 0x14 GET_INT_STATUS →...
  • Page 207 AN332 Table 46. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x30 TX_TUNE_FREQ ARG1 0x00 ARG2 0x27 Set frequency to 101.1 MHz = 10110d = 0x277E ARG3 0x7E → STATUS 0x80 Reply Status. Clear-to-send high. 0x14 GET_INT_STATUS → STATUS 0x81 Reply Status.
  • Page 208 AN332 Table 46. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x2C TX_RDS_PS_MIX ARG3 (PROP) 0x02 (Si4711/13/21 Only) ARG4 (PROPD) 0x00 Sets 50% mix of group 1A (program service) and other buffer/FIFO groups.
  • Page 209 AN332 Table 46. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x36 TX_RDS_PS (Si4711/13/21 Only) ARG1 0x00 PSID = 0 ARG2 0x53 Set text “SILA” ARG3 0x49 Complete text is ARG4 0x4C “SILABS SI471X RDS DEMO” ARG5 0x41 →...
  • Page 210 Set Group 2A, Text Location 0 ARG3 0x00 Set text “SILI” ARG4 0x53 ARG5 0x49 Complete text is ARG6 0x4C “SILICON LABORATORIES SI471X RDS DEMO” ARG7 0x49 → STATUS 0x80 Reply Status. Clear-to-send high. 0x35 TX_RDS_BUFF (Si4711/13/21 Only) ARG1 0x04...
  • Page 211 Set Group 2A, Text Location 5 ARG3 0x05 Set text “SI4” ARG4 0x20 ARG5 0x53 Complete text is ARG6 0x49 “SILICON LABORATORIES SI471X RDS DEMO” ARG7 0x34 → STATUS 0x80 Reply Status. Clear-to-send high. 0x35 TX_RDS_BUFF (Si4711/13/21 Only) ARG1 0x04...
  • Page 212 AN332 Table 46. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x21 TX_COMPONENT_ENABLE ARG3 (PROP) 0x00 (Si4711/13/21 Only) ARG4 (PROPD) 0x00 Enable (Stereo) LMR, Pilot and RDS. ARG5 (PROPD) 0x07 → STATUS 0x80 Reply Status.

  • Page 213: Programming Example For The Fm/Rds Receiver

    AN332 12.2. Programming Example for the FM/RDS Receiver The following is a flowchart showing the overview of how to program the FM/RDS Receiver. RESET CHIP STATE: POWER DOWN Check Chip Library ID Power Up POWER_UP with FUNC=15 With Patch? (command 0x01) POWER UP Library ID Contact Silabs...
  • Page 214 AN332 Use all default Set FM Tune Frequency Settings? (command 0x20) CHIP STATE: RECEIVING FM Set INT settings Use Interrupt? (property 0x0001) Set GPO Use GPO? (command 0x80, 0x81) Set RCLK settings (property 0x0201, 0x0202) Digital output mode? Set audio format (Si4705/21/31/35/37/39 (property 0x0102) only)
  • Page 215 AN332 Set Deemphasis (property 0x1100) Set Mono/Stereo Blend settings (property 0x1105,06) Not applicable to Set Soft Mute Settings Si4749 (property 0x1300,02,03) Set Volume (property 0x4000) Set Mute/Unmute (property 0x4001) Set Max Tune Error (property 0x1108) Set FM Tune Frequency (command 0x20) CHIP STATE: RECEIVING FM Query FM_TUNE_STATUS...
  • Page 216 AN332 Receive RDS? Set RDS_INT_SOURCE (Si4705/06/21/31/35/37/ (property 0x1500) 39/41/49 only) SetRDS_INT_FIFO_COUNT (property 0x1501) Disable RDS in RDS_CONFIG (property 0x1502) Set RDS_CONFIG & enable (property 0x1502) Received RDS Interrupt or poll RDSINT from GET_INT_STATUS Read RDS data with FM_RDS_STATUS (command 0x24) LOOP until RDS FIFO is empty...
  • Page 217 AN332 Monitor Received Set RSQ settings Signal Quality (RSQ)? (property 0x1200 - 0x1207) Query FM_RSQ_STATUS (command 0x23) Optional: Do something based on FM_RSQ_STATUS SEEK next Set SEEK settings Valid channel? (property 0x1400-1404) Send FM_SEEK_START (command 0x21) CHIP STATE: RECEIVING FM SCAN FM Band Set SEEK settings For valid channels?
  • Page 218 AN332 Need to change Disable digital audio by DCLK/DFS setting DFS sample rate to 0 Rate? (property 0x0104) (digital only) Change DCLK/DFS rate or Disable DCLK/DFS DCLK/DFS has been changed or re-enabled Enable digital audio by setting DFS sample rate (property 0x0104) Change Chip Function to FM Transmit (Si472x)
  • Page 219 AN332 Table 47 provides an example for the FM/RDS Receiver. The table is broken into three columns. The first column lists the action taking place: command (CMD), argument (ARG), status (STATUS) or response (RESP). For SET_PROPERTY commands, the property (PROP) and property data (PROPD) are indicated. The second column lists the data byte or bytes in hexadecimal that are being sent or received.
  • Page 220 AN332 Table 47. Programming Example for the FM/RDS Receiver (Continued) Action Data Description 0x10 GET_REV → STATUS 0x80 Reply Status. Clear-to-send high. → RESP1 0x1F Part Number, HEX (0x1F = 31 dec. = Si4731) → RESP2 0x32 Firmware Major Rev, ASCII (0x32 = 2) →...
  • Page 221 AN332 Table 47. Programming Example for the FM/RDS Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x40 RX_HARD_MUTE ARG3 (PROP) 0x01 ARG4 (PROPD) 0x00 Enable L and R audio outputs ARG5 (PROPD) 0x00 → STATUS 0x80 Reply Status. Clear-to-send high. SET_PROPERTY 0x12 ARG1...
  • Page 222 AN332 Table 47. Programming Example for the FM/RDS Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x12 FM_RSQ_SNR_LO_THRESHOLD ARG3 (PROP) 0x02 ARG4 (PROPD) 0x00 Threshold = 6 dB = 0x0006 ARG5 (PROPD) 0x06 → STATUS 0x80 Reply Status. Clear-to-send high. SET_PROPERTY 0x12 ARG1...
  • Page 223 AN332 Table 47. Programming Example for the FM/RDS Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x13 FM_SOFT_MUTE_SNR_THRESHOLD ARG3 (PROP) 0x03 ARG4 (PROPD) 0x00 Threshold = 6 dB = 0x0006 ARG5 (PROPD) 0x06 → STATUS 0x80 Reply Status. Clear-to-send high. SET_PROPERTY 0x12 ARG1...
  • Page 224 AN332 Table 47. Programming Example for the FM/RDS Receiver (Continued) Action Data Description 0x20 FM_TUNE_FREQ ARG1 0x00 ARG2 0x27 Set frequency to 102.3 MHz = 0x27F6 ARG3 0xF6 ARG4 0x00 Set antenna tuning capacitor to auto. → STATUS 0x80 Reply Status. Clear-to-send high. 0x14 GET_INT_STATUS →...
  • Page 225 AN332 Table 47. Programming Example for the FM/RDS Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2(PROP) 0x15 RDS_INT_SOURCE ARG3(PROP) 0x00 Enable RDSRECV interrupt (set RDSINT bit when RDS has filled the ARG4(PROPD) 0x00 FIFO by the amount set on FM_RDS_INTERRUPT_FIFO_COUNT ARG5(PROPD) 0x01 Reply Status.
  • Page 226 AN332 Table 47. Programming Example for the FM/RDS Receiver (Continued) Action Data Description FM_RDS_STATUS 0x24 Clear RDS interrupt. ARG1 0x01 Reply Status. Clear-to-send (CTS) high. Seek/Tune STATUS →0x80 Complete (STCINT) high. Interrupt source: RDS received. RESP1 →0x01 RDS Synchronized. No lost data. RESP2 →0x01 RDS FIFO Used: 0x16 = 22.
  • Page 227 AN332 Table 47. Programming Example for the FM/RDS Receiver (Continued) Action Data Description FM_RDS_STATUS 0x24 Clear RDS interrupt. ARG1 0x01 Reply Status. Clear-to-send (CTS) high. Seek/Tune STATUS →0x80 Complete (STCINT) high. Interrupt source: RDS received. RESP1 →0x01 RDS Synchronized. No lost data. RESP2 →0x01 RDS FIFO Used: 0x15 = 21...
  • Page 228 AN332 Table 47. Programming Example for the FM/RDS Receiver (Continued) Action Data Description FM_RDS_STATUS 0x24 Clear RDS interrupt. ARG1 0x01 Reply Status. Clear-to-send (CTS) high. Seek/Tune STATUS →0x80 Complete (STCINT) high. Interrupt source: RDS received. RESP1 →0x01 RDS Synchronized. No lost data. RESP2 →0x01 RDS FIFO Used: 0x14 = 20.
  • Page 229 → PTY: 00000b (Undefined) RESP7 →0x04 → Address code: 0004b = 4 (char 17,18,19,20) Block C: 0x5249 →RI RESP8 →0x52 RESP9 →0x49 Block D: 0x4553 →ES RESP10 →0x45 RESP11 →0x53 BLE: 0 (No Error) RESP12 →0x00 Current RT: “SILICON LABORATORIES” Confidential Rev. 0.2...
  • Page 230 →0x05 → Address code: 0005b = 5 (char 21,22,23,24) Block C: 0x2053 → S RESP8 →0x20 RESP9 →0x53 Block D: 0x4934 →I4 RESP10 →0x49 RESP11 →0x34 BLE: 0 (No Error) RESP12 →0x00 Current RT: “SILICON LABORATORIES SI4” Confidential Rev. 0.2...
  • Page 231 →0x06 → Address code: 0006b = 6 (char 25,26,27,28) Block C: 0x3731 →71 RESP8 →0x37 RESP9 →0x31 Block D: 0x5820 →x RESP10 →0x58 RESP11 →0x20 BLE: 0 (No Error) RESP12 →0x00 Current RT: “SILICON LABORATORIES SI471x ” Confidential Rev. 0.2...
  • Page 232 → Address code: 0007b = 7 (char 29,30,31,32) Block C: 0x5244 →RD RESP8 →0x52 RESP9 →0x44 Block D: 0x5320 →S RESP10 →0x53 RESP11 →0x20 BLE: 0 (No Error) RESP12 →0x00 Current RT: “SILICON LABORATORIES SI471x RDS ” Confidential Rev. 0.2...
  • Page 233 → Address code: 0008b = 8 (char 33,34,35,36) Block C: 0x4445 →DE RESP8 →0x44 RESP9 →0x45 Block D: 0x4D4F →MO RESP10 →0x4D RESP11 →0x4F BLE: 0 (No Error) RESP12 →0x00 Current RT: “SILICON LABORATORIES SI471x RDS DEMO” Confidential Rev. 0.2...
  • Page 234 Block D: 0x0000 → ‘NUL’ ‘NUL’ RESP10 →0x00 RESP11 →0x00 BLE: 0 (No Error) RESP12 →0x00 Current RT: “SILICON LABORATORIES SI471x RDS DEMO” - continue sending FM_RDS_STATUS until FIFO empty - 0x11 POWER_DOWN → STATUS 0x80 Reply Status. Clear-to-send high.

  • Page 235: Programming Example For The Am/Sw/Lw Receiver

    AN332 12.3. Programming Example for the AM/SW/LW Receiver The following flowchart shows an overview of how to program the AM/SW/LW receiver. RESET CHIP STATE: POWER DOWN Check Chip Library ID Power Up POWER_UP with FUNC=15 With Patch? (command 0x01) POWER UP Library ID Contact Silabs (command 0x01)
  • Page 236 AN332 Use all default Set AM Tune Frequency Settings? (command 0x40) CHIP STATE: RECEIVING AM / SW / LW Set INT settings Use Interrupt? (property 0x0001) Set GPO Use GPO? (command 0x80, 0x81) Set RCLK settings (property 0x0201, 0x0202) Digital output Set DIGITAL output settings mode? (property 0x0102, 0x0104)
  • Page 237 AN332 Set AM_DEEMPHASIS (property 0x3100) Set AM_CHANNEL_FILTER (property 0x3102) Set Soft Mute Settings (property 0x3300-3303) Set Volume (property 0x4000) Set Mute/Unmute (property 0x4001) Set AM Tune Frequency (command 0x40) CHIP STATE: RECEIVING AM / SW / LW Query AM_TUNE_STATUS (command 0x42) Confidential Rev.
  • Page 238 AN332 Monitor Received Set RSQ settings Signal Quality (RSQ)? (property 0x3200 - 0x3204) Query AM_RSQ_STATUS (command 0x43) Optional: Do something based on AM_RSQ_STATUS SEEK next Set SEEK settings Valid channel? (property 0x3400-3404) SEND AM_SEEK_START (COMMAND 0X41) CHIP STATE: RECEIVING AM / SW / LW SCAN AM/SW/LW Set SEEK settings Band...
  • Page 239 AN332 Change Chip Function To FM Receive or Weather Band? Repeat any of the RECEIVE instructions above after AM / SW / LW POWER_UP state DONE? To change settings Send POWER_DOWN Send POWER_DOWN (command 0x11) (command 0x11) CHIP STATE: CHIP STATE: POWER DOWN POWER DOWN Go back to the very first...
  • Page 240 AN332 Table 48 provides an example of programming the AM/SW/LW receiver. The table is broken into three columns. The first column lists the action taking place: command (CMD), argument (ARG), status (STATUS) or response (RESP). For SET_PROPERTY commands, the property (PROP) and property data (PROPD) are indicated. The second column lists the data byte or bytes in hexadecimal that are being sent or received.
  • Page 241 AN332 Table 48. Programming Example for the AM/SW/LW Receiver (Continued) Action Data Description 0x10 GET_REV → STATUS 0x80 Reply Status. Clear-to-send high. → RESP1 0x1F Part Number, HEX (0x1F = 31 dec. = Si4731) → RESP2 0x32 Firmware Major Rev, ASCII (0x32 = 2) →...
  • Page 242 AN332 Table 48. Programming Example for the AM/SW/LW Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x31 AM_DEEMPHASIS ARG3 (PROP) 0x00 ARG4 (PROPD) 0x00 50 µs ARG5 (PROPD) 0x01 → STATUS 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1 0x00...
  • Page 243 AN332 Table 48. Programming Example for the AM/SW/LW Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x33 AM_SOFT_MUTE_RATE ARG3 (PROP) 0x00 ARG4 (PROPD) 0x00 ARG5 (PROPD) 0x40 278 dB/s = 0x40 (also the default value) → STATUS 0x80 Reply Status.
  • Page 244 AN332 Table 48. Programming Example for the AM/SW/LW Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x34 AM_SEEK_SNR_THRESHOLD ARG3 (PROP) 0x03 ARG4 (PROPD) 0x00 0x000B = 11 dB ARG5 (PROPD) 0x0B → STATUS 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1...
  • Page 245 AN332 Table 48. Programming Example for the AM/SW/LW Receiver (Continued) Action Data Description 0x43 AM_RSQ_STATUS ARG1 0x01 Clear STC interrupt. → STATUS 0x80 Reply Status. Clear-to-send high. → RESP1 0x00 No SNR high, low, RSSI high, or low interrupts. → RESP2 0x01 Channel is valid, soft mute is not activated, and AFC is not railed...

  • Page 246: Programming Example For The Wb/Same Receiver

    AN332 12.4. Programming Example for the WB/SAME Receiver The following flowchart is an overview of how to program the WB (Weather Band) Receiver. RESET CHIP STATE: POWER DOWN Check Chip Library ID Power Up POWER_UP with FUNC=15 With Patch? (command 0x01) Library ID POWER UP Contact Silabs...
  • Page 247 AN332 Use all default Set WB Tune Frequency Settings? (command 0x50) CHIP STATE: RECEIVING WB Set INT settings Use Interrupt? (property 0x0001) Set GPO Use GPO? (command 0x80, 0x81) Set RCLK settings (property 0x0201, 0x0202) Confidential Rev. 0.2...
  • Page 248 AN332 Set WB Max Tune Error (property 0x5108) Set WB Valid SNR Threshold (property 0x5403) Set WB Valid RSSI Threshold (property 0x5404) Set Volume (property 0x4000) Set Mute/Unmute (property 0x4001) Set WB Tune Frequency (command 0x50) CHIP STATE: RECEIVING WB Query WB_TUNE_STATUS (command 0x52) Confidential Rev.
  • Page 249 AN332 Monitor Received Set RSQ settings Signal Quality (RSQ)? (property 0x5200 - 0x5204) Query WB_RSQ_STATUS (command 0x53) Optional: Do something based on WB_RSQ_STATUS Monitor Alert Tone Set ASQ int source (ASQ)? (property 0x5600) Query WB_ASQ_STATUS (command 0x55) Optional: Do something based on WB_ASQ_STATUS Set SAME int source...
  • Page 250 AN332 Change Chip Function Send POWER_DOWN To AM or FM? (command 0x11) CHIP STATE: POWER DOWN Repeat any of the instructions above after RECEIVE WB POWER_UP state DONE? To change settings Send POWER_UP For AM or FM Receive (command 0x01) Send POWER_DOWN (command 0x11) CHIP STATE:...
  • Page 251 AN332 Table 49 provides an example for the WB Receiver. The table is broken into three columns. The first column lists the action taking place: command (CMD), argument (ARG), status (STATUS) or response (RESP). For SET_PROPERTY commands, the property (PROP) and property data (PROPD) are indicated. The second column lists the data byte or bytes in hexadecimal that are being sent or received.
  • Page 252 AN332 Table 49. Programming Example for the WB/SAME Receiver (Continued) 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x40 RX_VOLUME ARG3 (PROP) 0x00 ARG4 (PROPD) 0x00 Output Volume = 63 ARG5 (PROPD) 0x3F STATUS → 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP)
  • Page 253 AN332 Table 49. Programming Example for the WB/SAME Receiver (Continued) 0x14 GET_INT_STATUS STATUS → 0x81 Reply Status. Clear-to-send high. STCINT = 1. 0x52 WB_TUNE_STATUS ARG1 0x01 Clear STC interrupt. STATUS → 0x80 Reply Status. Clear-to-send high. RESP1 → 0x01 Valid Frequency. RESP2 →...

  • Page 254: Document Change List

    AN332 OCUMENT HANGE Revision 0.1 to Revision 0.2 Updated Product Matrix in Table 1. Added Si4706 FM and High-Performance RDS Receiver support. Added Si4707 WB/SAME Receiver support. Added Si4740/41 multipath, blend, and AGC properties. Added Si4749 High-Performance RDS Receiver support. Updated Firmware, Library, and Component Compatibility tables.
  • Page 255 AN332 OTES Confidential Rev. 0.2...

  • Page 256: Contact Information

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