Silicon Laboratories Si47 Series Programming Manual
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Silicon Laboratories Si47 Series Programming Manual

Silicon Laboratories Si47 Series Programming Manual

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AN332
Si47
P
G
XX
ROGRAMMING
U I D E

1. Introduction

This document provides an overview of the programming requirements for the Si4704/05/06/07/1x/2x/3x/4x/84/85
FM transmitter/AM/FM/SW/LW/WB receiver. The hardware control interface and software commands are detailed
along with several examples of the required steps to configure the device for various modes of operation.

2. Overview

This family of products is programmed using commands and responses. To perform an action, the system
controller writes a command byte and associated arguments, causing the device to execute the given command.
The device will, in turn, provide a response depending on the type of command that was sent. Section "4.
Commands and Responses" on page 6 and section "5. Commands and Properties" on page 7 describe the
procedures for using commands and responses and provide complete lists of commands, properties, and
responses.
The device has a slave control interface that allows the system controller to send commands to and receive
2
responses from the device using one of three serial protocols (or bus modes): 2-wire mode (I
C and SMBUS
compatible), 3-wire mode, or SPI mode.
Section "6. Control Interface" on page 224 describes the control interface in detail.
Section "7. Powerup" on page 232 describes options for the sequencing of VDD and VIO power supplies, selection
of the desired bus mode, provision of the reference clock, RCLK, and sending of the POWER_UP command.
Section "8. Powerdown" on page 239 describes sending the POWER_DOWN command and removing VDD and
VIO power supplies as necessary.
Section "9. Digital Audio Interface" on page 240 describes the digital audio format supported and how to operate
the device in digital mode.
Section "10. Timing" on page 243 describes the CTS (Clear to Send) timing indicating when the command has
been accepted and in most cases completed execution, and the STC (Seek/Tune Complete) timing indicating
when the Seek/Tune commands have completed execution.
Section "11. FM Transmitter" on page 249 describes the audio dynamic range control, limiter, pre-emphasis,
recommendations for maximizing audio volume for the FM transmitter.
Section "12. Programming Examples" on page 253 provides flowcharts and step-by-step procedures for
programming the device.
Rev. 0.8 12/11
Copyright © 2011 by Silicon Laboratories
AN332

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Summary of Contents for Silicon Laboratories Si47 Series

  • Page 1: Introduction

    Section "11. FM Transmitter" on page 249 describes the audio dynamic range control, limiter, pre-emphasis, recommendations for maximizing audio volume for the FM transmitter. Section "12. Programming Examples" on page 253 provides flowcharts and step-by-step procedures for programming the device. Rev. 0.8 12/11 Copyright © 2011 by Silicon Laboratories AN332...
  • Page 2 AN332 Table 1. Product Family Function Part General Description Number Si4700 FM Receiver  Si4701 FM Receiver with RDS   Si4702 FM Receiver  Si4703 FM Receiver with RDS   Si4704 FM Receiver   Si4705 FM Receiver with RDS ...
  • Page 3 AN332 Table 1. Product Family Function (Continued) Si4741 AM/FM Receiver with RDS       Si4742 AM/LW/SW/FM/WB Receiver      AM/LW/SW/FM/WB Receiver with Si4743         Si4744 AM/LW/SW/FM Receiver ...

  • Page 4: Table Of Contents

    AN332 ABLE O F ONTENTS Section Page 1. Introduction .............1 2.

  • Page 5: Terminology

    AN332 3. Terminology SEN—Serial enable pin, active low; used as device select in 3-wire and SPI operation and address selection in  2-wire operation. SDIO—Serial data in/data out pin.  SCLK—Serial clock pin.  RST or RSTb—Reset pin, active low ...

  • Page 6: Commands And Responses

    AN332 4. Commands and Responses Commands control actions, such as power up, power down, or tune to a frequency, and are one byte in size. Arguments are specific to a given command and are used to modify the command. For example, after the TX_TUNE_FREQ command, arguments are required to set the tune frequency.

  • Page 7: Commands And Properties

    AN332 5. Commands and Properties There are four different components for these product families: 1. FM Transmitter component 2. FM Receiver component 3. AM/SW/LW component 4. WB component The following four subsections list all the commands and properties used by each of the component. 5.1.
  • Page 8 AN332 Table 5. FM Transmitter Property Summary Available In Prop Name Description Default 0x0001 GPO_IEN Enables interrupt sources. 0x0000 All except 0x0101 DIGITAL_INPUT _FORMAT Configures the digital input format. 0x0000 Si4710-A10 Configures the digital input sample All except rate in 1 Hz steps. 0x0103 DIGITAL_INPUT _SAMPLE_RATE 0x0000...
  • Page 9 AN332 Table 5. FM Transmitter Property Summary (Continued) Available In Prop Name Description Default Enables audio dynamic range control and limiter. 0x2200 TX_ACOMP_ENABLE 0x0002 Default is 2 (limiter is enabled, audio dynamic range control is disabled). Sets the threshold level for audio 0x2201 TX_ACOMP_THRESHOLD dynamic range control.
  • Page 10 AN332 Table 5. FM Transmitter Property Summary (Continued) Available In Prop Name Description Default 0x2C01 TX_RDS_PI Sets transmit RDS program identifier. 0x40A7 Si4711/13/21 Configures mix of RDS PS Group 0x2C02 TX_RDS_PS_MIX 0x0003 Si4711/13/21 with RDS Group Buffer. Miscellaneous bits to transmit along 0x2C03 TX_RDS_PS_MISC 0x1008...
  • Page 11 AN332 Table 6. Status Response RDSINT ASQINT STCINT STATUS Name Function Clear to Send. 0 = Wait before sending next command. 1 = Clear to send next command. Error. 0 = No error 1 = Error Reserved Values may vary. RDS Interrupt.
  • Page 12 AN332 5.1.1. Commands and Properties for the FM/RDS Transmitter Command 0x01. POWER_UP Initiates the boot process to move the device from powerdown to powerup mode. The boot can occur from internal device memory or a system controller downloaded patch. To confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the POWER_UP command with Function = 15 (query library ID).
  • Page 13 AN332 Name Function Function. 0–1, 3–14 = Reserved. FUNC[3:0] 2 = Transmit. 15 = Query Library ID. Application Setting OPMODE[7:0] 01010000 = Analog audio inputs (LIN/RIN) 00001111 = Digital audio inputs (DIN/DFS/DCLK) Response (to FUNC = 2, TX) RDSINT ASQINT STCINT STATUS Response (to FUNC = 15, Query Library ID)
  • Page 14 AN332 Command 0x10. GET_REV Returns the part number, chip revision, firmware revision, patch revision and component revision numbers. The command is complete when the CTS bit (and optional interrupt) is set. This command may only be sent when in powerup mode. Available in: All Command arguments: None Response bytes: Eight...
  • Page 15 AN332 Command 0x11. POWER_DOWN Moves the device from powerup to powerdown mode. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note that only the POWER_UP command is accepted in powerdown mode.
  • Page 16 AN332 Command 0x12. SET_PROPERTY Sets a property shown in Table 5, “FM Transmitter Property Summary,” on page 8. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode.
  • Page 17 AN332 Command 0x13. GET_PROPERTY Gets a property shown in Table 5, “FM Transmitter Property Summary,” on page 8. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode.
  • Page 18 AN332 Command 0x14. GET_INT_STATUS Updates bits 6:0 of the status byte. This command should be called after any command that sets the STCINT, ASQINT, or RDSINT bits. When polling this command should be periodically called to monitor the STATUS byte, and when using interrupts, this command should be called after the interrupt is set to update the STATUS byte.
  • Page 19 AN332 Command 0x30. TX_TUNE_FREQ Sets the state of the RF carrier and sets the tuning frequency between 76 and 108 MHz in 10 kHz units and steps of 50 kHz. For example 76.05 MHz = 7605 is valid because it follows the 50 kHz step requirement but 76.01 MHz = 7601 is not valid.
  • Page 20 AN332 Command 0x31. TX_TUNE_POWER Sets the RF voltage level between 88 dBµV and 115 dBµV in 1 dB units. Power may be set as high as 120 dBµV; however, voltage accuracy is not guaranteed. A value of 0x00 indicates off. The command also sets the antenna tuning capacitance.
  • Page 21 AN332 Command 0x32. TX_TUNE_MEASURE Enters receive mode (disables transmitter output power) and measures the received noise level (RNL) in units of dBµV on the selected frequency. The command sets the tuning frequency between 76 and 108 MHz in 10 kHz units and steps of 50 kHz.
  • Page 22 AN332 Command 0x33. TX_TUNE_STATUS Returns the status of the TX_TUNE_FREQ, TX_TUNE_MEASURE, or TX_TUNE_POWER commands. The command returns the current frequency, output voltage in dBµV (if applicable), the antenna tuning capacitance value (0–191) and the received noise level (if applicable). The command clears the STCINT interrupt bit when INTACK bit of ARG1 is set.
  • Page 23 AN332 RESP Name Function Reserved Returns various data. Read Frequency High Byte. READFREQ [7:0] This byte in combination with READFREQ returns frequency being tuned. Read Frequency Low Byte. READFREQ [7:0] This byte in combination with READFREQ returns frequency being tuned. Reserved Returns various data.
  • Page 24 AN332 Command 0x34. TX_ASQ_STATUS Returns status information about the audio signal quality and current FM transmit frequency. This command can be used to check if the input audio stream is below a low threshold as reported by the IALL bit, or above a high threshold as reported by the IALH bit.
  • Page 25 AN332 Response STATUS RDSINT ASQINT STCINT RESP1 OVERMOD IALH IALL RESP2 RESP3 RESP4 INLEVEL[7:0] RESP Name Function Overmodulation Detection. OVERMOD 0 = Output signal is below requested modulation level. 1 = Output signal is above requested modulation level. Input Audio Level Threshold Detect High. IALH 0 = Input audio level high threshold not exceeded.
  • Page 26 AN332 Command 0x35. TX_RDS_BUFF Loads or clears the RDS group buffer FIFO or circular buffer and returns the FIFO status. The buffer can be allocated between the circular buffer and FIFO with the TX_RDS_FIFO_SIZE property. A common use case for the circular buffer is to broadcast group 2A radio text, and a common use case for the FIFO is to broadcast group 4A real time clock.
  • Page 27 AN332 Name Function RDS Block B Low Byte. RDSB [7:0] This byte in combination with RDSB sets the RDS block B data. RDS Block C High Byte. RDSC [7:0] This byte in combination with RDSC sets the RDS block C data. RDS Block C Low Byte.
  • Page 28 AN332 Command 0x36. TX_RDS_PS Loads or clears the program service buffer. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note: TX_RDS_PS is supported in FMTX component 2.0 or later. Available in: Si4711/13/21 Command arguments: Five Response bytes: None...
  • Page 29 AN332 Command 0x80. GPIO_CTL Enables output for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output (Hi-Z or active drive) by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit. The state (high or low) of GPO1, 2, and 3 is set with the GPIO_SET command.
  • Page 30 AN332 Command 0x81. GPIO_SET Sets the output level (high or low) for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit in the GPIO_CTL command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state.
  • Page 31 AN332 5.1.2. FM/RDS Transmitter Properties Property 0x0001. GPO_IEN Configures the sources for the GPO2/INT interrupt pin. Valid sources are the lower 8 bits of the STATUS byte, including CTS, ERR, RDSINT, ASQINT, and STCINT bits. The corresponding bit is set before the interrupt occurs. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 32 AN332 Property 0x0101. DIGITAL_INPUT_FORMAT Configures the digital input format. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: DIGITAL_INPUT_FORMAT is supported in FMTX component 2.0 or later. Available in: All except Si4710-A10 Default: 0x0000 D15 D14...
  • Page 33 AN332 Property 0x0103. DIGITAL_INPUT_SAMPLE_RATE Configures the digital input sample rate in 1 Hz units. The input sample rate must be set to 0 before removing the DCLK input or reducing the DCLK frequency below 2 MHz. If this guideline is not followed, a device reset will be required.
  • Page 34 AN332 Property 0x0201. REFCLK_FREQ Sets the frequency of the REFCLK from the output of the prescaler. (Figure 1 shows the relation between RCLK and REFCLK.) The REFCLK range is 31130 to 34406 Hz (32768 ±5% Hz) in 1 Hz steps, or 0 (to disable AFC). For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz REFCLK.
  • Page 35 AN332 REFCLKF[15:0] Name Name Function Frequency of Reference Clock in Hz. 15:0 REFCLKF[15:0] The allowed REFCLK frequency range is between 31130 and 34406 Hz (32768 ±5%), or 0 (to disable AFC). Property 0x0202. REFCLK_PRESCALE Sets the number used by the prescaler to divide the external RCLK down to the internal REFCLK. The range may be between 1 and 4095 in 1 unit steps.
  • Page 36 AN332 Property 0x2100. TX_COMPONENT_ENABLE Individually enables the stereo pilot, left minus right stereo and RDS components. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 37 AN332 Property 0x2102. TX_PILOT_DEVIATION Sets the transmit pilot deviation from 0 to 90 kHz in 10 Hz units. The sum of the audio deviation, pilot deviation and RDS deviation should not exceed regulatory requirements, typically 75 kHz. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 38 AN332 Property 0x2104. TX_LINE_INPUT_LEVEL Sets the input resistance and maximum audio input level for the LIN/RIN pins. An application providing a 150 mV input to the device on RIN/LIN would set Line Attenuation = 00, resulting in a maximum permissible input level of on LIN/RIN and an input resistance of 396 k ...
  • Page 39 AN332 Property 0x2105. TX_LINE_INPUT_MUTE Selectively mutes the left and right audio inputs. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Available in: All Default: 0x0000 D15 D14 D13 D12 D11 D10...
  • Page 40 AN332 Property 0x2107. TX_PILOT_FREQUENCY This property is used to set the frequency of the stereo pilot in 1 Hz steps. The stereo pilot is nominally set to 19 kHz for stereo operation, however the pilot can be set to any frequency from 0 Hz to 19 kHz to support the generation of an audible test tone.
  • Page 41 AN332 Property 0x2201. TX_ACOMP_THRESHOLD Sets the threshold for audio dynamic range control from 0 dBFS to –40 dBFS in 1 dB units in 2's complement notation. For example, a setting of –40 dB would be 65536 – 40 = 65496 = 0xFFD8. The threshold is the level below which the device applies the gain set by the TX_ACOMP_GAIN property, and above which the device applies the compression defined by (gain + threshold) / threshold.
  • Page 42 AN332 Property 0x2202. TX_ACOMP_ATTACK_TIME Sets the time required for the device to respond to audio level transitions from below the threshold in the gain region to above the threshold in the compression region. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 43 AN332 Property 0x2203. TX_ACOMP_RELEASE_TIME Sets the time required for the device to respond to audio level transitions from above the threshold in the compression region to below the threshold in the gain region. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 44 AN332 Property 0x2205. TX_LIMITER_RELEASE_TIME Sets the time required for the device to respond to audio level transitions from above the limiter threshold to below the limiter threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 45 AN332 Property 0x2300. TX_ASQ_INTERRUPT_SELECT This property is used to enable which Audio Signal Quality (ASQ) measurements trigger ASQ_INT bit in the TX_ASQ_STATUS command. OVERMODIEN bit enables ASQ interrupt by the OVERMOD bit, which turns on with overmodulation of the FM output signal due to excessive input signal level. IALHIEN and IALLIEN bits enable ASQ interrupt by the IALH and IALL bits, which report high or low input audio condition.
  • Page 46 AN332 Property 0x2301. TX_ASQ_LEVEL_LOW This property sets the low audio level threshold relative to 0 dBFS in 1 dB increments, which is used to trigger the IALL bit. This threshold can be set to detect a silence condition in the input audio allowing the host to take an appropriate action such as disabling the RF carrier or powering down the chip.
  • Page 47 AN332 Property 0x2303. TX_ASQ_LEVEL_HIGH This property sets the high audio level threshold relative to 0 dBFS in 1 dB increments, which is used to trigger the IALH bit. This threshold can be set to detect an activity condition in the input audio allowing the host to take an appropriate action such as enabling the RF carrier after an extended silent period.
  • Page 48 AN332 Property 0x2304. TX_ASQ_DURATION_HIGH This property is used to determine the duration (in 1 ms increments) that the input signal must be above the TX_ASQ_LEVEL_HIGH threshold in order for a IALH condition to be generated. The range is 0 to 65535 ms, and the default is 0 ms.
  • Page 49 AN332 Property 0x2C00. TX_RDS_INTERRUPT_SOURCE Configures the RDS interrupt sources. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_INTERRUPT_SOURCE is supported in FMTX component 2.0 or later. Available in: Si4711/13/21 Default: 0x0000 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5...
  • Page 50 AN332 Property 0x2C01. TX_RDS_PI Sets the RDS PI code to be transmitted in block A and block C (for type B groups). The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 51 AN332 Property 0x2C03. TX_RDS_PS_MISC Configures miscellaneous RDS flags. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_PS_MISC is supported in FMTX component 2.0 or later. Available in: Si4711/13/21 Default: 0x1008 D9 D8 D7 D6 D5...
  • Page 52 AN332 Property 0x2C04. TX_RDS_PS_REPEAT_COUNT Sets the number of times a program service group 0A is repeated. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. Note: TX_RDS_PS_REPEAT_COUNT is supported in FMTX component 2.0 or later.
  • Page 53 AN332 Property 0x2C06. TX_RDS_PS_AF Sets the AF RDS Program Service Alternate Frequency. This provides the ability to inform the receiver of a single alternate frequency using AF Method A coding and is transmitted along with the RDS_PS Groups. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 54 AN332 Property 0x2C07. TX_RDS_FIFO_SIZE Sets the RDS FIFO size in number of blocks. Note that the value written must be one larger than the desired FIFO size. The number of blocks allocated will reduce the size of the Circular RDS Group Buffer by the same amount. For instance, if RDSFIFOSZ = 20, then the RDS Circular Buffer will be reduced by 20 blocks.

  • Page 55: Commands And Properties For The Fm/Rds Receiver (Si4704/05/06/2X/3X/4X/84/85)

    AN332 5.2. Commands and Properties for the FM/RDS Receiver (Si4704/05/06/2x/3x/4x/84/85) Tables 8 and 9 summarize the commands and properties for the FM/RDS Receiver component applicable to Si4704/05/06/2x/3x/4x/84/85. Table 8. FM/RDS Receiver Command Summary Name Description Available In 0x01 POWER_UP Power up device and mode selection. 0x10 GET_REV Returns revision information on the device.
  • Page 56 AN332 Table 9. FM/RDS Receiver Property Summary Available In Prop Name Description Default 0x0001 GPO_IEN Enables interrupt sources. 0x0000 Si4705/06, Si4721/31/35/37/ DIGITAL_OUTPUT_ 0x0102 Configure digital audio outputs. 0x0000 Si4730/34/36/38- FORMAT D60 and later, Si4741/43/45, Si4784/85 Si4705/06, Si4721/31/35/37/ DIGITAL_OUTPUT_ 0x0104 Configure digital audio output sample rate. 0x0000 Si4730/34/36/38- SAMPLE_RATE...
  • Page 57 AN332 Table 9. FM/RDS Receiver Property Summary (Continued) Available In Prop Name Description Default FM_RSQ_SNR_LO_ 0x1202 Sets low threshold for SNR interrupt. 0x0000 THRESHOLD FM_RSQ_RSSI_HI_ 0x1203 Sets high threshold for RSSI interrupt. 0x007F THRESHOLD FM_RSQ_RSSI_LO_ 0x1204 Sets low threshold for RSSI interrupt. 0x0000 THRESHOLD Si4706-C30 and...
  • Page 58 AN332 Table 9. FM/RDS Receiver Property Summary (Continued) Available In Prop Name Description Default Si4706-C30 and later, Sets soft mute attack rate. Smaller values Si4740/41/42/43/ FM_SOFT_MUTE_ provide slower attack, and larger values 0x1305 0x2000 44/45, ATTACK_RATE provide faster attack. The default is 8192 Si4704/05/30/31/ (approximately 8000 dB/s) 34/35/84/85-D50...
  • Page 59 AN332 Table 9. FM/RDS Receiver Property Summary (Continued) Available In Prop Name Description Default Si4706-C30 and Sets RSSI threshold for stereo blend. (Full later, stereo above threshold, blend below Si4740/41/42/43/ FM_BLEND_RSSI_ 0x1800 threshold.) To force stereo, set this to 0. To 0x0031 44/45, STEREO_THRESHOLD...
  • Page 60 AN332 Table 9. FM/RDS Receiver Property Summary (Continued) Available In Prop Name Description Default Si4740/41/42/ 43/44/45, Si4704/05-D50 Sets the stereo to mono attack rate for and later, SNR based blend. Smaller values provide FM_BLEND_SNR_ATTACK_ 0x1806 slower attack and larger values provide 0x0FA0 Si4706-C30 and RATE...
  • Page 61 AN332 Table 9. FM/RDS Receiver Property Summary (Continued) Available In Prop Name Description Default Si4740/41/42/43/ 44/45, Sets the mono to stereo release rate for Si4704/05-D50 Multipath based blend. Smaller values pro- and later, FM_BLEND_MULTIPATH_ 0x180B vide slower release and larger values pro- 0x0028 Si4706-C30 and RELEASE_RATE...
  • Page 62 AN332 Table 9. FM/RDS Receiver Property Summary (Continued) Available In Prop Name Description Default Si4740/41/42/43/ 44/45, Si4704/05-D50 Sets the rate at which hi-cut lowers the cut- and later, 0x1A02 FM_HICUT_ ATTACK_RATE off frequency. Default value is 20000 0x4E20 Si4706-C30 and (approximately 3 ms) later , Si4730/31/34/35/ 84/85-D50 and...
  • Page 63 AN332 Table 10. Status Response for the FM/RDS Receiver RSQINT RDSINT STCINT STATUS Name Function Clear to Send. 0 = Wait before sending next command. 1 = Clear to send next command. Error . 0 = No error 1 = Error Reserved Values may vary.
  • Page 64 AN332 5.2.1. FM/RDS Receiver Commands Command 0x01. POWER_UP Initiates the boot process to move the device from powerdown to powerup mode. The boot can occur from internal device memory or a system controller downloaded patch. To confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the POWER_UP command with FUNC = 15 (query library ID).
  • Page 65 AN332 Name Function Crystal Oscillator Enable. Note: Set to 0 for Si4740/41/42/43/44/45/49 0 = Use external RCLK (crystal oscillator disabled). XOSCEN 1 = Use crystal oscillator (RCLK and GPO3/DCLK with external 32.768 kHz crys- tal and OPMODE=00000101). See Si47xx Data Sheet Application Schematic for external BOM details. Function.
  • Page 66 AN332 RESERVED[7:0] Reserved, various values. RESERVED[7:0] Reserved, various values. CHIPREV[7:0] Chip Revision (ASCII). LIBRARYID[7:0] Library Revision (HEX). Command 0x10. GET_REV Returns the part number, chip revision, firmware revision, patch revision and component revision numbers. The command is complete when the CTS bit (and optional interrupt) is set. This command may only be sent when in powerup mode.
  • Page 67 AN332 RESP Name Function PN[7:0] Final 2 digits of Part Number (HEX). FWMAJOR[7:0] Firmware Major Revision (ASCII). FWMINOR[7:0] Firmware Minor Revision (ASCII). PATCH [7:0] Patch ID High Byte (HEX). PATCH [7:0] Patch ID Low Byte (HEX). CMPMAJOR[7:0] Component Major Revision (ASCII). CMPMINOR[7:0] Component Minor Revision (ASCII).
  • Page 68 AN332 Command 0x12. SET_PROPERTY Sets a property shown in Table 9, “FM/RDS Receiver Property Summary,” on page 56. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode.
  • Page 69 AN332 Command 0x13. GET_PROPERTY Gets a property as shown in Table 9, “FM/RDS Receiver Property Summary,” on page 56. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode.
  • Page 70 AN332 Command 0x14. GET_INT_STATUS Updates bits 6:0 of the status byte. This command should be called after any command that sets the STCINT, RDSINT, or RSQINT bits. When polling this command should be periodically called to monitor the STATUS byte, and when using interrupts, this command should be called after the interrupt is set to update the STATUS byte.
  • Page 71 AN332 Command FREEZE FAST ARG1 FREQ [7:0] ARG2 FREQ [7:0] ARG3 ANTCAP[7:0] ARG4 Name Function Reserved Always write to 0. Freeze Metrics During Alternate Frequency Jump. If set will cause the blend, hicut, and softmute to transition as a function of the FREEZE associated attack/release parameters rather than instantaneously when tuning to alternate station.
  • Page 72 AN332 Command 0x21. FM_SEEK_START Begins searching for a valid frequency. Clears any pending STCINT or RSQINT interrupt status. The CTS bit (and optional interrupt) is set when it is safe to send the next command. RSQINT status is only cleared by the RSQ status command when the INTACK bit is set.
  • Page 73 AN332 Command 0x22. FM_TUNE_STATUS Returns the status of FM_TUNE_FREQ or FM_SEEK_START commands. The command returns the current frequency, RSSI, SNR, multipath, and the antenna tuning capacitance value (0-191). The command clears the STCINT interrupt bit when INTACK bit of ARG1 is set. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 74 AN332 RESP Name Function Band Limit. BLTF Reports if a seek hit the band limit (WRAP = 0 in FM_START_SEEK) or wrapped to the original frequency (WRAP = 1). Reserved Always returns 0. AFC Rail Indicator. AFCRL Set if the AFC rails. Valid Channel.
  • Page 75 AN332 Command 0x23. FM_RSQ_STATUS Returns status information about the received signal quality. The commands returns the RSSI, SNR, frequency offset, and stereo blend percentage. It also indicates valid channel (VALID), soft mute engagement (SMUTE), and AFC rail status (AFCRL). This command can be used to check if the received signal is above the RSSI high threshold as reported by RSSIHINT, or below the RSSI low threshold as reported by RSSILINT.
  • Page 76 AN332 RESP Name Function Blend Detect Interrupt. BLENDINT 0 = Blend is within the Blend threshold settings. 1 = Blend goes above or below the Blend threshold settings. Multipath Detect High (Si474x, Si4706-C30 and later and Si4704/05/30/31/34/35/84/85-D50 and later only). MULTHINT 0 = Detected multipath value has not exceeded above the Multipath high threshold.
  • Page 77 AN332 Command 0x24. FM_RDS_STATUS Returns RDS information for current channel and reads an entry from the RDS FIFO. RDS information includes synch status, FIFO status, group data (blocks A, B, C, and D), and block errors corrected. This command clears the RDSINT interrupt bit when INTACK bit in ARG1 is set and, if MTFIFO is set, the entire RDS receive FIFO is cleared (FIFO is always cleared during FM_TUNE_FREQ or FM_SEEK_START).
  • Page 78 AN332 RDSFIFOUSED[7:0] RESP3 BLOCKA[15:8] RESP4 BLOCKA[7:0] RESP5 BLOCKB[15:8] RESP6 BLOCKB[7:0] RESP7 BLOCKC[15:8] RESP8 BLOCKC[7:0] RESP9 BLOCKD[15:8] RESP10 BLOCKD[7:0] RESP11 RESP12 BLEA[1:0] BLEB[1:0] BLEC[1:0] BLED[1:0] RESP Name Function RDS New Block B. RDSNEWBLOCKB 1 = Valid Block B data has been received. RDS New Block A.
  • Page 79 AN332 RESP Name Function BLOCKD[15:8] RDS Block D. Block D group data from oldest FIFO entry. BLOCKD[7:0] RDS Block A Corrected Errors. 0 = No errors. BLEA[1:0] 1 = 1–2 bit errors detected and corrected. 2 = 3–5 bit errors detected and corrected. 3 = Uncorrectable.
  • Page 80 AN332 Command 0x27. FM_AGC_STATUS Returns the AGC setting of the device. The command returns whether the AGC is enabled or disabled and it returns the LNA Gain index. This command may only be sent when in powerup mode. Available in: All Command arguments: None Response bytes: Two Command...
  • Page 81 AN332 Command 0x28. FM_AGC_OVERRIDE Overrides AGC setting by disabling the AGC and forcing the LNA to have a certain gain that ranges between 0 (minimum attenuation) and 26 (maximum attenuation). This command may only be sent when in powerup mode. Available in: All Command arguments: Two Response bytes: None...
  • Page 82 AN332 Command 0x80. GPIO_CTL Enables output for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output (Hi-Z or active drive) by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit. The state (high or low) of GPO1, 2, and 3 is set with the GPIO_SET command.
  • Page 83 AN332 Command 0x81. GPIO_SET Sets the output level (high or low) for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit in the GPIO_CTL command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state.
  • Page 84 AN332 5.2.2. FM/RDS Receiver Properties Property 0x0001. GPO_IEN Configures the sources for the GPO2/INT interrupt pin. Valid sources are the lower 8 bits of the STATUS byte, including CTS, ERR, RSQINT, RDSINT (Si4705/21/31/35/37/39/41/43/45/85 only), and STCINT bits. The corresponding bit is set before the interrupt occurs. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 85 AN332 Property 0x0102. DIGITAL_OUTPUT_FORMAT Configures the digital audio output format. Configuration options include DCLK edge, data format, force mono, and sample precision. Available in: Si4705/06, Si4721/31/35/37/39, Si4730/34/36/38-D60 and later, Si4741/43/45, Si4784/85 Default: 0x0000 Note: DIGITAL_OUTPUT_FORMAT is supported in FM receive component 2.0 or later. OFALL OMODE[3:0] OMONO...
  • Page 86 AN332 Property 0x0104. DIGITAL_OUTPUT_SAMPLE_RATE Enables digital audio output and configures digital audio output sample rate in samples per second (sps). When DOSR[15:0] is 0, digital audio output is disabled. The over-sampling rate must be set in order to satisfy a minimum DCLK of 1 MHz.
  • Page 87 AN332 Property 0x0201. REFCLK_FREQ Sets the frequency of the REFCLK from the output of the prescaler. The REFCLK range is 31130 to 34406 Hz (32768 ±5% Hz) in 1 Hz steps, or 0 (to disable AFC). For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz REFCLK.
  • Page 88 AN332 Property 0x0202. REFCLK_PRESCALE Sets the number used by the prescaler to divide the external RCLK down to the internal REFCLK. The range may be between 1 and 4095 in 1 unit steps. For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz.
  • Page 89 AN332 Property 0x1100. FM_DEEMPHASIS Sets the FM Receive de-emphasis to 50 or 75 µs. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 75 µs. Available in: All except Si4749 Default: 0x0002 D15 D14 D13 D12 D11 D10...
  • Page 90 AN332 Property 0x1105. FM_BLEND_STEREO_THRESHOLD Sets RSSI threshold for stereo blend (Full stereo above threshold, blend below threshold). To force stereo, set this to 0. To force mono, set this to 127. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 91 AN332 Property 0x1107. FM_ANTENNA_INPUT Selects what type of antenna and what pin it is connected to. Default is 0 which means the antenna used is a headphone (long) antenna and it is connected to the FMI pin. Setting the FMTXO bit to 1 means that the antenna used is an embedded (short) antenna and it is connected to the TXO/LPI pin.
  • Page 92 AN332 Property 0x1200. FM_RSQ_INT_SOURCE Configures interrupt related to Received Signal Quality metrics. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0. Available in: All Default: 0x0000 D15 D14 D13 D12 D11 D10 D9 D8...
  • Page 93 AN332 Property 0x1201. FM_RSQ_SNR_HI_THRESHOLD Sets high threshold which triggers the RSQ interrupt if the SNR is above this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 94 AN332 Property 0x1203. FM_RSQ_RSSI_HI_THRESHOLD Sets high threshold which triggers the RSQ interrupt if the RSSI is above this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 95 AN332 Property 0x1205. FM_RSQ_MULTIPATH_HI_THRESHOLD Sets the high threshold which triggers the RSQ interrupt if the Multipath level is above this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in power up mode.
  • Page 96 AN332 Property 0x1207. FM_RSQ_BLEND_THRESHOLD Sets the blend threshold for blend interrupt when boundary is crossed. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 1%.
  • Page 97 AN332 Property 0x1301. FM_SOFT_MUTE_SLOPE Configures attenuation slope during soft mute in dB attenuation per dB SNR below the soft mute SNR threshold. Soft mute attenuation is the minimum of SMSLOPE x (SMTHR – SNR) and SMATTN. The recommended SMSLOPE value CEILING(SMATTN/SMTHR).
  • Page 98 AN332 Property 0x1303. FM_SOFT_MUTE_SNR_THRESHOLD Sets SNR threshold to engage soft mute. Whenever the SNR for a tuned frequency drops below this threshold, the FM reception will go in soft mute, provided soft mute max attenuation property is non-zero. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 99 AN332 Property 0x1305. FM_SOFT_MUTE_ATTACK_RATE Sets the soft mute attack rate. Smaller values provide slower attack and larger values provide faster attack. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 100 AN332 Property 0x1400. FM_SEEK_BAND_BOTTOM Sets the bottom of the FM band for seek. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 87.5 MHz. Available in: All Default: 0x222E Units: 10 kHz...
  • Page 101 AN332 Property 0x1401. FM_SEEK_BAND_TOP Sets the top of the FM band for seek. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 107.9 MHz. Available in: All Default: 0x2A26 Units: 10 kHz...
  • Page 102 AN332 Property 0x1403. FM_SEEK_TUNE_SNR_THRESHOLD Sets the SNR threshold for a valid FM Seek/Tune. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 3 dB. Available in: All Default: 0x0003 Units: dB...
  • Page 103 AN332 Property 0x1500. FM_RDS_INT_SOURCE Configures interrupt related to RDS. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0. Available in: Si4705/06, Si4721, Si4731/35/37/39, Si4741/43/45/49 Default: 0x0000 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6...
  • Page 104 AN332 Property 0x1502. FM_RDS_CONFIG Configures RDS settings to enable RDS processing (RDSEN) and set RDS block error thresholds. When a RDS Group is received, all block errors must be less than or equal the associated block error threshold for the group to be stored in the RDS FIFO.
  • Page 105 AN332 Recommended Block Error Threshold options: 2,2,2,2 = No group stored if any errors are uncorrected. 3,3,3,3 = Group stored regardless of errors. 0,0,0,0 = No group stored containing corrected or uncorrected errors. 3,2,3,3 = Group stored with corrected errors on B, regardless of errors on A, C, or D. Property 0x1503.
  • Page 106 AN332 Note: Was property 0x4100 in FW2.B. D2 D1 ATTACK[7:0] Name Property 0x1701. FM_AGC_RELEASE_RATE Sets the AGC release rate. Larger values provide slower release and smaller values provide faster release. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 107 AN332 Property 0x1801. FM_BLEND_RSSI_MONO_THRESHOLD Sets RSSI threshold for mono blend (Full mono below threshold, blend above threshold). To force stereo, set this to 0. To force mono, set this to 127. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 108 AN332 Property 0x1803. FM_BLEND_RSSI_RELEASE_RATE Sets the mono to stereo release rate for RSSI based blend. Smaller values provide slower release and larger values provide faster release. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 109 AN332 Property 0x1804. FM_BLEND_SNR_STEREO_THRESHOLD Sets SNR threshold for stereo blend (Full stereo above threshold, blend below threshold). To force stereo, set this to 0. To force mono, set this to 127. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 110 AN332 Property 0x1806. FM_BLEND_SNR_ATTACK_RATE Sets the stereo to mono attack rate for SNR based blend. Smaller values provide slower attack and larger values provide faster attack. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 111 AN332 x = 0x1804: FM_BLEND_SNR_STEREO_THRESHOLD (0-127 dB) y = 0x1805: FM_BLEND_SNR_MONO_THRESHOLD (0-127 dB) SNR (dB) x=30, y=14 (Default) x=40, y=14 x=30, y=20 Figure 5. SNR Blend Property 0x1808. FM_BLEND_MULTIPATH_STEREO_THRESHOLD Sets Multipath threshold for stereo blend (Full stereo below threshold, blend above threshold). To force stereo, set to 100.
  • Page 112 AN332 Property 0x1809. FM_BLEND_MULTIPATH_MONO_THRESHOLD Sets Multipath threshold for mono blend (Full mono above threshold, blend below threshold). To force stereo, set to 100. To force mono, set to 0. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 113 AN332 Property 0x180B. FM_BLEND_MULTIPATH_RELEASE_RATE Sets the mono to stereo release rate for Multipath based blend. Smaller values provide slower release and larger values provide faster release. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 114 AN332 Property 0x180C. FM_BLEND_MAX_STEREO_SEPARATION Sets the maximum allowable stereo separation. The default is 0, disabling the feature so that there is no limit on stereo separation. Available in: Si474x Default: 0x0000 MAX_SEP[2:0] Name Name Function 15:3 Reserved Always write to 0. MAX_SEP Maximum Stereo Separation.
  • Page 115 AN332 Property 0x1900. FM_NB_DETECT_THRESHOLD Sets the threshold for detecting impulses in dB above the noise floor. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 16 dB.
  • Page 116 AN332 Property 0x1903. FM_NB_IIR_FILTER Sets the bandwidth of the noise floor estimator. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 300 (465 Hz). Bandwidth (Hz) = NB_IIR_FILTER[15:0] x 1.55 Available in: Si4742/43/44/45 Default: 0x012C...
  • Page 117 AN332 Si4742/43 FM Impulse Noise Blanker Blanker Input time FM_NB_DETECT_THRESHOLD time LPF IIR Output FM_NB_IIR_FILTER: adjusts LPF FM_NB_INTERVAL FM_NB_DELAY Blanker Output time FM_NB_RATE: sets maximum repeat rate NB is allowed to fire. Figure 7. FM Noise Blanker Rev. 0.8...
  • Page 118 AN332 Property 0x1A00. FM_HICUT_SNR_HIGH_THRESHOLD Sets the SNR level at which hi-cut begins to band limit. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read in POWERUP mode. The default is 24 dB. Available in: Si4740/41/42/43/44/45, Si4704/05-D50 and later, Si4706-C30 and later, Si4730/31/34/35/84/85-D50 and later Default: 0x0018...
  • Page 119 AN332 Property 0x1A03. FM_HICUT_RELEASE_RATE Sets the rate at which hi-cut increases the transition frequency. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read in POWERUP mode. The default is 20 (approximately 3.3 s).
  • Page 120 AN332 Property 0x1A06. FM_HICUT_CUTOFF_FREQUENCY Sets the maximum band limit frequency for hi-cut and also sets the maximum audio frequency. The CTS bit (optional interrupt) is set when it is safe to send the next command. This property may only be set or read in POWERUP mode.
  • Page 121 AN332 w = 0x1A00: FM_HICUT_SNR_HIGH_THRESHOLD (0-127 dB) x = 0x1A01: FM_HICUT_SNR_LOW_THRESHOLD (0-127 dB) y = 0x1A06: FM_HICUT_CUTOFF_FREQ[2:0] (0-7) z = 0x1A06: MAXIMUM AUDIO FREQ[6:4] (0-7) SNR (dB) w=24, x=15, y=0, z=0 (Default) w=24, x=15, y=1, z=0 w=30, x=15, y=1, z=0 Figure 8.
  • Page 122 AN332 w = 0x1A04: FM_HICUT_MULTIPATH_TRIGGER_THRESHOLD (0-100 %) x = 0x1A05: FM_HICUT_MULTIPATH_END_THRESHOLD (0-100 %) y = 0x1A06: FM_HICUT_CUTOFF_FREQ[2:0] (0-7) z = 0x1A06: MAXIMUM AUDIO FREQ[6:4] (0-7) Multipath (%) w=20, x=60, y=0, z=0 (Default) w=20, x=60, y=1, z=0 w=30, x=60, y=1, z=0 Figure 10.
  • Page 123 AN332 Property 0x4000. RX_VOLUME Sets the audio output volume. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 63. Available in: All except Si4749 Default: 0x003F Step: 1...

  • Page 124: Commands And Properties For The Am/Sw/Lw Receiver (Si4730/31/34/35/36/37/40/41/42/43/44/45)

    AN332 5.3. Commands and Properties for the AM/SW/LW Receiver (Si4730/31/34/35/36/37/40/41/42/43/44/45) AM (Medium Wave), SW (Short Wave), and LW (Long Wave) use the same AM_SW_LW component, thus the commands and properties for these functions are the same. For simplicity reason, the commands and properties only have a prefix AM instead of AM_SW_LW.
  • Page 125 AN332 Table 13. AM/SW/LW Receiver Property Summary Prop Name Description Default Available In 0x0001 GPO_IEN Enables interrupt sources. 0x0000 Si4705/06, Si4731/35/37/39, Si4730/34/36/38- DIGITAL_OUTPUT_ 0x0102 Configure digital audio outputs 0x0000 D60 and later, FORMAT Si4741/43/45, Si4784/85 Si4705/06, Si4731/35/37/39, Si4730/34/36/38- DIGITAL_OUTPUT_ 0x0104 Configure digital audio output sample rate 0x0000 D60 and later,...
  • Page 126 AN332 Table 13. AM/SW/LW Receiver Property Summary (Continued) Prop Name Description Default Available In AM_RSQ_SNR_LOW_ 0x3202 Sets low threshold for SNR interrupt. 0x0000 THRESHOLD AM_RSQ_RSSI_HIGH_ 0x3203 Sets high threshold for RSSI interrupt. 0x007F THRESHOLD AM_RSQ_RSSI_LOW_ 0x3204 Sets low threshold for RSSI interrupt. 0x0000 THRESHOLD Sets the attack and decay rates when entering or...
  • Page 127 AN332 Table 13. AM/SW/LW Receiver Property Summary (Continued) Prop Name Description Default Available In AM_SEEK_BAND_ Sets the bottom of the AM band for seek. Default is 0x3400 0x0208 BOTTOM 520. Sets the top of the AM band for seek. Default is 0x3401 0x06AE AM_SEEK_BAND_TOP...
  • Page 128 AN332 Table 14. Status Response for the AM/SW/LW Receiver RSQINT STCINT STATUS Name Function Clear to Send. 0 = Wait before sending next command. 1 = Clear to send next command. Error. 0 = No error 1 = Error Reserved Values may vary.
  • Page 129 AN332 5.3.1. AM/SW/LW Receiver Commands Command 0x01. POWER_UP Initiates the boot process to move the device from powerdown to powerup mode. The boot can occur from internal device memory or a system controller downloaded patch. To confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the POWER_UP command with FUNC = 15 (query library ID).
  • Page 130 AN332 Name Function Crystal Oscillator Enable. 0 = Use external RCLK (crystal oscillator disabled). XOSCEN 1 = Use crystal oscillator (RCLK and GPO3/DCLK with external 32.768 kHz crystal and OPMODE = 00000101). See Si473x Data Sheet Application Schematic for external BOM details. Function.
  • Page 131 AN332 Command 0x10. GET _ REV Returns the part number, chip revision, firmware revision, patch revision and component revision numbers. The command is complete when the CTS bit (and optional interrupt) is set. This command may only be sent when in powerup mode.
  • Page 132 AN332 Command 0x11. POWER _ DOWN Moves the device from powerup to powerdown mode. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note that only the POWER_UP command is accepted in powerdown mode.
  • Page 133 AN332 Command 0x12. SET _ PROPERTY Sets a property shown in Table 13, “AM/SW/LW Receiver Property Summary,” on page 125. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode.
  • Page 134 AN332 Command 0x13. GET _ PROPERTY Gets a property shown in Table 13, “AM/SW/LW Receiver Property Summary,” on page 125. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode.
  • Page 135 AN332 Command 0x14. GET _ INT _ STATUS Updates bits 6:0 of the status byte. This command should be called after any command that sets the STCINT or RSQINT bits. When polling this command should be periodically called to monitor the STATUS byte, and when using interrupts, this command should be called after the interrupt is set to update the STATUS byte.
  • Page 136 AN332 ARG3 FREQ [7:0] ARG4 ANTCAP [15:8] ARG5 ANTCAP [7:0] Name Function Reserved Always write to 0. FAST Tuning. FAST If set, executes fast and invalidated tune. The tune status will not be accurate. Tune Frequency High Byte. FREQ This byte in combination with FREQ selects the tune frequency in kHz.
  • Page 137 AN332 Command 0x41. AM_SEEK_START Initiates a seek for a channel that meets the RSSI and SNR criteria for AM. Clears any pending STCINT or RSQINT interrupt status. RSQINT is only cleared by the RSQ status command when the INTACK bit is set. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 138 AN332 Name Function Reserved Always write to 0. Seek Up/Down. SEEKUP Determines the direction of the search, either UP = 1, or DOWN = 0. Wrap/Halt. WRAP Determines whether the seek should Wrap = 1, or Halt = 0 when it hits the band limit.
  • Page 139 AN332 Command 0x42. AM_TUNE_STATUS Returns the status of AM_TUNE_FREQ or AM_SEEK_START commands. The commands returns the current frequency, RSSI, SNR, and the antenna tuning capacitance value (0–6143). The command clears the STCINT interrupt bit when INTACK bit of ARG1 is set. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 140 AN332 RESP Bit Name Function Band Limit. BLTF Reports if a seek hit the band limit (WRAP = 0 in AM_START_SEEK) or wrapped to the original frequency (WRAP = 1). Reserved Always returns 0. AFC Rail Indicator. AFCRL Set if the AFC rails. Valid Channel.
  • Page 141 AN332 Command 0x43. AM_RSQ_STATUS Returns status information about the received signal quality. The commands returns RSSI and SNR. It also indicates valid channel (VALID), soft mute engagement (SMUTE), and AFC rail status (AFCRL). This command can be used to check if the received signal is above the RSSI high threshold as reported by RSSIHINT, or below the RSSI low threshold as reported by RSSILINT.
  • Page 142 AN332 RESP Name Function SNR Detect High. SNRHINT 0 = Received SNR has not exceeded above SNR high threshold. 1 = Received SNR has exceeded above SNR high threshold. SNR Detect Low. SNRLINT 0 = Received SNR has not exceeded below SNR low threshold. 1 = Received SNR has exceeded below SNR low threshold.
  • Page 143 AN332 RESP Name Function AM AGC Disable This bit indicates if the AGC is enabled or disabled. AMAGCDIS 0 = AGC enabled. 1 = AGC disabled. AM AGC Index This byte reports the current AGC gain index. 0 = Minimum attenuation (max gain) AMAGCNDX 1 –...
  • Page 144 AN332 Command 0x80. GPIO_CTL Enables output for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output (Hi-Z or active drive) by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit. The state (high or low) of GPO1, 2, and 3 is set with the GPIO_SET command.
  • Page 145 AN332 Command 0x81. GPIO_SET Sets the output level (high or low) for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit in the GPIO_CTL command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state.
  • Page 146 AN332 5.3.2. AM/SW/LW Receiver Properties Property 0x0001. GPO_IEN Configures the sources for the GPO2/INT interrupt pin. Valid sources are the lower 8 bits of the STATUS byte, including CTS, ERR, RSQINT, and STCINT bits. The corresponding bit is set before the interrupt occurs. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 147 AN332 Property 0x0102. DIGITAL_OUTPUT_FORMAT Configures the digital audio output format. Configuration options include DCLK edge, data format, force mono, and sample precision. Note: DIGITAL_OUTPUT_FORMAT is supported in AM_SW_LW component 2.0 or later. Available in: Si4705/06, Si4731/35/37/39, Si4730/34/36/38-D60 and later, Si4741/43/45, Si4784/85 Default: 0x0000 OFALL OMODE[3:0]...
  • Page 148 AN332 Property 0x0104. DIGITAL_OUTPUT_SAMPLE_RATE Enables digital audio output and configures digital audio output sample rate in samples per second (sps). When DOSR[15:0] is 0, digital audio output is disabled. To enable digital audio output, program DOSR[15:0] with the sample rate in samples per second. The over-sampling rate must be set in order to satisfy a minimum DCLK of 1 MHz.
  • Page 149 AN332 Property 0x0201. REFCLK_FREQ Sets the frequency of the REFCLK from the output of the prescaler. The REFCLK range is 31130 to 34406 Hz (32768 5% Hz) in 1 Hz steps, or 0 (to disable AFC). For example, an RCLK of 13MHz would require a prescaler value of 400 to divide it to 32500 Hz REFCLK.
  • Page 150 AN332 Name Function 15:0 REFCLKF[15:0] Frequency of Reference Clock in Hz. The allowed REFCLK frequency range is between 31130 and 34406 Hz (32768 5%), or 0 (to disable AFC). Property 0x0202. REFCLK_PRESCALE Sets the number used by the prescaler to divide the external RCLK down to the internal REFCLK. The range may be between 1 and 4095 in 1 unit steps.
  • Page 151 AN332 Property 0x3100. AM_DEEMPHASIS Sets the AM Receive de-emphasis to 50 µs. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is disabled. Available in: All Default: 0x0000 D15 D14 D13 D12 D11 D10...
  • Page 152 AN332 Property 0x3103. AM_AUTOMATIC_VOLUME_CONTROL_MAX_GAIN Sets the maximum gain for automatic volume control. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 16 dB. The maximum AVC gain affects audio output level, especially under weak signal conditions.
  • Page 153 AN332 Name Function SW Pull-In Range 15:0 SWPIR[15:0] The SW pull-in range expressed relative to the tuned frequency. Property 0x3105. AM_MODE_AFC_SW_LOCK_IN_RANGE Sets the SW AFC lock-in or capture range. The value LOCK_IN_RANGE is relative to the tuned frequency and is –6 specified as 1/( PPM×10 ).
  • Page 154 AN332 Interrupt Source Enable: RSSI High. RSSIHIEN Enable RSSI low as the source of interrupt which the threshold is set by AM_RSQ_RSSI_HI_THRESHOLD. Interrupt Source Enable: RSSI Low. RSSILIEN Enable RSSI low as the source of interrupt which the threshold is set by AM_RSQ_RSSI_LO_THRESHOLD.
  • Page 155 AN332 Property 0x3201. AM_RSQ_SNR_HI_THRESHOLD Sets high threshold which triggers the RSQ interrupt if the SNR is above this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 156 AN332 Property 0x3203. AM_RSQ_RSSI_HI_THRESHOLD Sets high threshold which triggers the RSQ interrupt if the RSSI is above this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 157 AN332 Property 0x3300. AM_SOFT_MUTE_RATE Sets the attack and decay rates when entering or leaving soft mute. The value specified is multiplied by 4.35 dB/s to come up with the actual attack rate. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 158 AN332 15:4 Reserved Always write to 0. AM Slope Mute Attenuation Slope. SMSLOPE[3:0] Set soft mute attenuation slope in dB attenuation per dB SNR below the soft mute SNR threshold. Property 0x3302. AM_SOFT_MUTE_MAX_ATTENUATION Sets maximum attenuation during soft mute (dB). Set to 0 to disable soft mute. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 159 AN332 Name Function 15:6 Reserved Always write to 0. AM Soft Mute SNR Threshold. The SNR threshold for a tuned frequency below which soft mute is engaged provided SMTHR the value written to the AM_SOFT_MUTE_MAX_ATTENUATION property is not zero. Default SNR threshold is 8 dB. Property 0x3304.
  • Page 160 AN332 Property 0x3305. AM_SOFT_MUTE_ATTACK_RATE Sets the soft mute attack rate. Smaller values provide slower attack and larger values provide faster attack. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 161 AN332 Property 0x3400. AM_SEEK_BAND_BOTTOM Sets the lower boundary for the AM band in kHz. This value is used to determine when the lower end of the AM band is reached when performing a seek. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 162 AN332 Property 0x3401. AM_SEEK_BAND_TOP Sets the upper boundary for the AM band in kHz. This value is used to determine when the higher end of the AM band is reached when performing a seek. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 163 AN332 Property 0x3402. AM_SEEK_FREQ_SPACING Sets the frequency spacing for the AM Band when performing a seek. The frequency spacing determines how far the next tune is going to be from the currently tuned frequency. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 164 AN332 Property 0x3403. AM_SEEK_TUNE_SNR_THRESHOLD Sets the SNR threshold for a valid AM Seek/Tune. If the value is zero, then SNR is not used as a valid criteria when doing a seek for AM. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 165 AN332 Property 0x3702. AM_AGC_ATTACK_RATE Sets the AGC attack rate. Large values provide slower attack, and smaller values provide faster attack. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read in POWERUP mode.
  • Page 166 AN332 Property 0x3703. AM_AGC_RELEASE_RATE Sets the AGC release rate. Larger values provide slower release, and smaller values provide faster release. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read in POWERUP mode.
  • Page 167 AN332 2. Determine sensitivity RF input and SINAD requirements. 3. Set frequency to 1000kHz. 4. With source impedance in #1 and RF input in #2, adjust MIN_GAIN_INDEX until SINAD requirements are achieved with minimum necessary margin. 5. Program this value into Si474x MIN_GAIN_INDEX as part of initialization after POWERUP command. ATTN_BACKUP insures the AGC gain indexes are monotonic and is used when the external attenuator is engaged via GPO1/AGC2.
  • Page 168 AN332 Property 0x3900. AM_NB_DETECT_THRESHOLD Sets the threshold for detecting impulses in dB above the noise floor. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read in POWERUP mode. The default is 12 dB.
  • Page 169 AN332 Property 0x3903. AM_NB_IIR_FILTER Sets the bandwidth of the noise floor estimator. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read in POWERUP mode. The default is 300 (465 Hz). Bandwidth (Hz) = NB_IIR_FILTER[15:0] x 1.55 Available in: Si4742/43/44/45 Default: 0x012C...
  • Page 170 AN332 Blanker Input time AM_NB_DETECT_THRESHOLD time LPF IIR Output AM_NB_IIR_FILTER: adjusts LPF AM_NB_INTERVAL AM_NB_DELAY Blanker Output time AM_NB_RATE: sets maximum repeat rate NB is allowed to fire. Figure 14. AM Noise Blanker Property 0x4000. RX_VOLUME Sets the audio output volume. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 171 AN332 Property 0x4001. RX_HARD_MUTE Mutes the audio output. L and R audio outputs may not be muted independently. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.

  • Page 172: Commands And Properties For The Wb Receiver (Si4707/36/37/38/39/42/43)

    AN332 5.4. Commands and Properties for the WB Receiver (Si4707/36/37/38/39/42/43) The following two tables are the summary of the commands and properties for the Weather Band Receiver component applicable to Si4707/36/37/38/39/42/43. Table 17. WB Receiver Command Summary Name Description Available In 0x01 POWER_UP Power up device and mode selection.
  • Page 173 AN332 Table 18. WB Receive Property Summary Prop Name Description Default Available In 0x0001 GPO_IEN Enables interrupt sources. 0x0000 DIGITAL_OUTPUT_ 0x0102 Configure digital audio outputs. 0x0000 Si4737/39/43 FORMAT DIGITAL_OUTPUT_ Configure digital audio output sam- 0x0104 0x0000 Si4737/39/43 ple rate. SAMPLE_RATE Sets frequency of reference clock in Hz.
  • Page 174 AN332 Table 19. Status Response for the WB Receiver RSQINT SAMEINT ASQINT STCINT STATUS Name Function Clear to Send. 0 = Wait before sending next command. 1 = Clear to send next command. Error. 0 = No error 1 = Error Reserved Values may vary.
  • Page 175 AN332 5.4.1. WB Receiver Commands Command 0x01. POWER_UP Initiates the boot process to move the device from powerdown to powerup mode. The boot can occur from internal device memory or a system controller downloaded patch. To confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the POWER_UP command with FUNC = 15 (query library ID).
  • Page 176 AN332 Name Function CTSIEN CTS Interrupt Enable. 0 = CTS interrupt disabled. 1 = CTS interrupt enabled. GPO2OEN GPO2 Output Enable. 0 = GPO2 output disabled. 1 = GPO2 output enabled. PATCH Patch Enable. 0 = Boot normally 1 = Copy NVM to RAM, but do not boot. After CTS has been set, RAM may be patched XOSCEN Crystal Oscillator Enable.
  • Page 177 AN332 Response (FUNC = 3, WB Receive) RSQINT SAMEINT ASQINT STCINT STATUS Response (FUNC = 15, Query Library ID) RSQINT SAMEINT ASQINT STCINT STATUS PN[7:0] RESP1 FWMAJOR[7:0] RESP2 FWMINOR[7:0] RESP3 RESERVED[7:0] RESP4 RESERVED[7:0] RESP5 CHIPREV[7:0] RESP6 LIBRARYID[7:0] RESP7 RESP Name Function PN[7:0] Final 2 digits of part number (HEX).
  • Page 178 AN332 Command 0x10. GET _ REV Returns the part number, chip revision, firmware revision, patch revision and component revision numbers. The command is complete when the CTS bit (and optional interrupt) is set. This command may only be sent when in powerup mode.
  • Page 179 AN332 Command 0x11. POWER_DOWN Moves the device form powerup to powerdown mode. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note that only the POWER_UP command is accepted in powerdown mode.
  • Page 180 AN332 Name Function Reserved Always write to 0. Property High Byte. PROP [7:0] This byte in combination with PROP is used to specify the property to modify. Property Low Byte. PROP [7:0] This byte in combination with PROP is used to specify the property to modify. Property Value High Byte.
  • Page 181 AN332 Response RSQINT SAMEINT ASQINT STCINT STATUS RESP1 PROPV [7:0] RESP2 PROPV [7:0] RESP3 RESP Name Function Reserved Always returns 0. PROPV [7:0] Property Value High Byte. This byte in combination with PROPV will represent the requested property value. PROPV [7:0] Property Value High Byte.
  • Page 182 AN332 Command 0x50. WB_TUNE_FREQ Sets the WB Receive to tune the frequency between 162.4 MHz and 162.55 MHz in 2.5 kHz units. For example 162.4 MHz = 64960 and 162.55 MHz = 65020. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 183 AN332 Command 0x52. WB_TUNE_STATUS Returns the status of WB_TUNE_FREQ. The commands returns the current frequency, and RSSI/SNR at the moment of tune. The command clears the STCINT interrupt bit when INTACK bit of ARG1 is set. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 184 AN332 Data Name Function Reserved Always returns 0. AFC Rail Indicator. AFCRL This bit will be set if the AFC rails. Valid Channel. VALID Confirms if the tuned channel is currently valid. Read Frequency High Byte. READFREQ [7:0] This byte in combination with READFREQ returns frequency being tuned.
  • Page 185 AN332 Response RSQINT SAMEINT ASQINT STCINT STATUS SNRHI SNRLINT RSSIHI RSSIILINT RESP1 AFCRL VALID RESP2 RESP3 RSSI[7:0] RESP4 ASNR[7:0] RESP5 RESP6 FREQOFF[7:0] RESP7 Data Name Function SNRHINT SNR Detect High. 0 = Received SNR has not exceeded above SNR high threshold. 1 = Received SNR has exceeded above SNR high threshold.
  • Page 186 AN332 Command 0x54. WB_SAME_STATUS Retrieves SAME information, acknowledges SAMEINT interrupts and clears the message buffer. The command indicates whether the start of message, end of message or preamble is detected and if the header buffer is ready. The state of the decoder, message length, and 8 bytes of the message buffer with corresponding confidence level is returned.
  • Page 187 AN332 Response RSQINT SAMEINT ASQINT STCINT STATUS EOMDET SOMDET PREDET HDRRDY RESP1 STATE[7:0] RESP2 MSGLEN[7:0] RESP3 CONF7[1:0] CONF6[1:0] CONF5[1:0] CONF4[1:0] RESP4 CONF3[1:0] CONF2[1:0] CONF1[1:0] CONF0[1:0] RESP5 DATA0[7:0] RESP6 DATA1[7:0] RESP7 DATA2[7:0] RESP8 DATA3[7:0] RESP9 DATA4[7:0] RESP10 DATA5[7:0] RESP11 DATA6[7:0] RESP12 DATA7[7:0] RESP13 RESP...
  • Page 188 AN332 RESP Name Function Confidence Metric for DATA7 represented as a number between 0 [7:6] CONF7[1:0] (low) and 3 (high). Confidence Metric for DATA6 represented as a number between 0 [5:4] CONF6[1:0] (low) and 3 (high). Confidence Metric for DATA5 represented as a number between 0 [3:2] CONF5[1:0] (low) and 3 (high).
  • Page 189 AN332 Command 0x55. WB_ASQ_STATUS Returns status information about the 1050kHz alert tone in Weather Band. The commands returns the alert on/off Interrupt and the present state of the alert tone. The command clears the ASQINT bit when INTACK bit of ARG1 is set.
  • Page 190 AN332 Data Name Function ALERTOFF_INT ALERTOFF_INT. 0 = 1050 Hz alert tone has not been detected to be absent since the last WB_TUNE_FREQ or WB_RSQ_STATUS with INTACK = 1. 1 = 1050 Hz alert tone has been detected to be absent since the last WB_TUNE_FREQ or WB_RSQ_STATUS with INTACK = 1.
  • Page 191 AN332 Command 0x58. WB_AGC_OVERRIDE Overrides AGC setting by disabling the AGC and forcing the LNA to have a certain gain that ranges between 0 (minimum attenuation) and 26 (maximum attenuation). This command may only be sent when in powerup mode. Available in: All Command arguments: One Response bytes: None...
  • Page 192 AN332 Command 0x80. GPIO_CTL Enables output for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output (Hi-Z or active drive) by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit. The state (high or low) of GPO1, 2, and 3 is set with the GPIO_SET command.
  • Page 193 AN332 Command 0x81. GPIO_SET Sets the output level (high or low) for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit in the GPIO_CTL command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state.
  • Page 194 AN332 5.4.2. WB Receiver Properties Property 0x0001. GPO_IEN Configures the sources for the GPO2/IRQ interrupt pin. Valid sources are the lower 8 bits of the STATUS byte, including CTS, ERR, RSQINT, SAMEINT (Si4707 only), ASQINT, and STCINT bits. The corresponding bit is set before the interrupt occurs.
  • Page 195 AN332 Name Function RSQ Interrupt Enable RSQIEN 0 = No interrupt generated when RSQINT is set (default). 1 = Interrupt generated when RSQINT is set. SAME Interrupt Enable (Si4707 Only). SAMEIEN 0 = No interrupt generated when SAMEINT is set (default). 1 = Interrupt generated when SAMEINT is set.
  • Page 196 AN332 Property 0x0104. DIGITAL_OUTPUT_SAMPLE_RATE Enables digital audio output and configures digital audio output sample rate in samples per second (sps). When DOSR[15:0] is 0, digital audio output is disabled. The over-sampling rate must be set in order to satisfy a minimum DCLK of 1 MHz.
  • Page 197 AN332 Property 0x0201. REFCLK_FREQ Sets the frequency of the REFCLK from the output of the prescaler. The REFCLK range is 31130 to 34406 Hz (32768 5% Hz) in 1 Hz steps, or 0 (to disable AFC). For example, an RCLK of 13MHz would require a prescaler value of 400 to divide it to 32500 Hz REFCLK.
  • Page 198 AN332 Name Function 15:0 REFCLKF[15:0] Frequency of Reference Clock in Hz. The allowed REFCLK frequency range is between 31130 and 34406 Hz (32768 5%), or 0 (to disable AFC). Property 0x0202. REFCLK_PRESCALE Sets the number used by the prescaler to divide the external RCLK down to the internal REFCLK. The range may be between 1 and 1023 in 1 unit steps.
  • Page 199 AN332 Property 0x5108. WB_MAX_TUNE_ERROR Sets the maximum freq error allowed before setting the AFC_RAIL indicator.The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 10 kHz.
  • Page 200 AN332 Name Function SNRHIEN Interrupt Source Enable: Audio SNR High. Enable SNR high as the source of interrupt which the threshold is set by WB_RSQ_SNR_HI_THRESHOLD. SNRLIEN Interrupt Source Enable: Audio SNR Low. Enable SNR low as the as the source of interrupt which the threshold is set by WB_RSQ_SNR_LO_THRESHOLD.
  • Page 201 AN332 Property 0x5202. WB_RSQ_SNR_LO_THRESHOLD Sets low threshold which will trigger the RSQ interrupt if the Audio SNR is below this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 202 AN332 Property 0x5204. WB_RSQ_RSSI_LO_THRESHOLD Sets low threshold which will trigger the RSQ interrupt if the RSSI is below this threshold. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.
  • Page 203 AN332 Property 0x5404. WB_VALID_RSSI_THRESHOLD Sets the RSSI threshold which the WB_RSQ_STATUS and WB_TUNE_STATUS will consider the channel valid if the received RSSI is at or above this value. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 204 AN332 Property 0x5600. WB_ASQ_INT_SOURCE Configures interrupt related to the 1050kHz alert tone. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode. The default is 0. Available in: All Default: 0x0000 Name...
  • Page 205 AN332 Property 0x4001. RX_HARD_MUTE Mutes the audio output. L and R audio outputs may not be muted independently. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in powerup mode.

  • Page 206: Commands And Properties For The Stereo Audio Adc Mode (Si4704/05/30/31/34/35)

    AN332 5.5. Commands and Properties for the Stereo Audio ADC Mode (Si4704/05/30/31/34/35) The following two tables are the summary of the commands and properties for the Stereo Audio ADC component applicable to Si4704/05/30/31/34/35-D60. Table 21. Stereo Audio ADC Mode Command Summary Name Description Devices...
  • Page 207 AN332 ASQINT Name Name Function Clear to Send. 0 = Wait before sending next command. 1 = Clear to send next command. Error. 0 = No error 1 = Error Reserved Values may vary. ASQINT Audio Signal Quality Interrupt. 0 = Audio signal quality interrupt has not been triggered. 1 = Audio signal quality interrupt has been triggered.
  • Page 208 AN332 5.5.1. Stereo Audio ADC Mode Commands Command 0x01. POWER_UP Initiates the boot process to move the device from powerdown to powerup mode. The boot can occur from internal device memory or a system controller downloaded patch. To confirm that the patch is compatible with the internal device library revision, the library revision should be confirmed by issuing the POWER_UP command with FUNC = 15 (query library ID).
  • Page 209 AN332 Name Function Crystal Oscillator Enable. Note: Set to 0 for Si4740/41/42/43/44/45/49 0 = Use external RCLK (crystal oscillator disabled). XOSCEN 1 = Use crystal oscillator (RCLK and GPO3/DCLK with external 32.768 kHz crys- tal and OPMODE=00000101). See Si47xx Data Sheet Application Schematic for external BOM details. Function.
  • Page 210 AN332 Command 0x10. GET_REV Returns the part number, chip revision, firmware revision, patch revision and component revision numbers. The command is complete when the CTS bit (and optional interrupt) is set. This command may only be sent when in powerup mode. Available in: All Command arguments: None Response bytes: Fifteen (Si4705 only), Eight (Si4704/3x)
  • Page 211 AN332 Command 0x11. POWER _ DOWN Moves the device from powerup to powerdown mode. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode. Note that only the POWER_UP command is accepted in powerdown mode.
  • Page 212 AN332 Command 0x12. SET_PROPERTY Sets a property shown in Table 22, “Stereo Audio ADC Mode Property Summary,” on page 206. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode.
  • Page 213 AN332 Command 0x13. GET_PROPERTY Gets a property as shown in Table 22, “Stereo Audio ADC Mode Property Summary,” on page 206. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode.
  • Page 214 AN332 Command 0x14. GET_INT_STATUS Updates bits 6:0 of the status byte. This command should be called after any command that sets the ASQINT bit. When polling this command should be periodically called to monitor the STATUS byte, and when using interrupts, this command should be called after the interrupt is set to update the STATUS byte.
  • Page 215 AN332 Command 0x65. AUX_ASQ_STATUS Returns status information about audio signal quality. The command returns the input signalLEVEL. This command can be used to detect if a signal overload condition is present indicated by OVERLOADINT. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This command may only be sent when in powerup mode.
  • Page 216 AN332 Command 0x80. GPIO_CTL Enables output for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output (Hi-Z or active drive) by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit. The state (high or low) of GPO1, 2, and 3 is set with the GPIO_SET command.
  • Page 217 AN332 Command 0x81. GPIO_SET Sets the output level (high or low) for GPO1, 2, and 3. GPO1, 2, and 3 can be configured for output by setting the GPO1OEN, GPO2OEN, and GPO3OEN bit in the GPIO_CTL command. To avoid excessive current consumption due to oscillation, GPO pins should not be left in a high impedance state.
  • Page 218 AN332 5.5.2. Stereo Audio ADC Mode Properties Property 0x0001. GPO_IEN Configures the sources for the GPO2/INT interrupt pin. Valid sources are the lower 8 bits of the STATUS byte, including CTS, ERR, and ASQINT bits. The corresponding bit is set before the interrupt occurs. The CTS bit (and optional interrupt) is set when it is safe to send the next command.
  • Page 219 AN332 Property 0x0102. DIGITAL_OUTPUT_FORMAT Configures the digital audio output format. Configuration options include DCLK edge, data format, force mono, and sample precision. Available in: All Default: 0x0000 OFALL OMODE[3:0] OMONO OSIZE[1:0] Name Name Function 15:8 Reserved Always write to 0. Digital Output DCLK Edge.
  • Page 220 AN332 Property 0x0104. DIGITAL_OUTPUT_SAMPLE_RATE Enables digital audio output and configures digital audio output sample rate in samples per second (sps). When DOSR[15:0] is 0, digital audio output is disabled. The over-sampling rate must be set in order to satisfy a minimum DCLK of 1 MHz.
  • Page 221 AN332 Property 0x0201. REFCLK_FREQ Sets the frequency of the REFCLK from the output of the prescaler. The REFCLK range is 31130 to 34406 Hz (32768 ±5% Hz) in 1 Hz steps, or 0 (to disable AFC). For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz REFCLK.
  • Page 222 AN332 Property 0x0202. REFCLK_PRESCALE Sets the number used by the prescaler to divide the external RCLK down to the internal REFCLK. The range may be between 1 and 4095 in 1 unit steps. For example, an RCLK of 13 MHz would require a prescaler value of 400 to divide it to 32500 Hz.
  • Page 223 AN332 Property 0x6600. AUX_ASQ_INTERRUPT_SOURCE Configures interrupt related to Audio Signal Quality metrics. The CTS bit (and optional interrupt) is set when it is safe to send the next command. This property may only be set or read when in power up mode. The default is 0. Available in: All Default: 0x0000 0X0000...

  • Page 224: Control Interface

    AN332 6. Control Interface The bus mode is selected by sampling the state of the GPO1 and GPO2/INT pins on the rising edge of RST. The GPO1 pin includes a 1 M  internal pull-up resistor that is connected while RST is low, and the GPO2/INT pin includes an internal 1 M ...
  • Page 225 AN332 SCLK A6-A0, D7-D0 D7-D0 SDIO START ADDRESS + R/W DATA DATA STOP Figure 18. 2-wire Control Interface Read and Write Timing Diagram 2-wire bus mode uses only the SCLK and SDIO pins for signaling. A transaction begins with the START condition, which occurs when SDIO falls while SCLK is high.
  • Page 226 AN332 To send the TX_TUNE_FREQ command and arguments, the system controller sends the START condition, followed by the 8-bit control word, which consists of a seven-bit device address (0010001b SEN = 0 or 1100011b SEN = 1) and the write bit (0b) indicated by ADDR+W = 00100010b = 0x22. In this example, SEN = 0 resulting in the control word ADDR+W = 00100010b = 0x22.

  • Page 227: 3-Wire Control Interface Mode

    AN332 6.2. 3-Wire Control Interface Mode Figures 19 and 20 show the 3-wire Control Interface Read and Write Timing Parameters and Diagrams, respectively. Refer to the Si471x data sheet for timing parameter values. SCLK HSDIO HIGH HSEN A6-A5, SDIO R/W, D14-D1 A4-A1 Address In...
  • Page 228 AN332 Table 26. Register Map for 3-Wire Mode Name D15 D14 D13 D12 D11 D7 D6 D5 D4 D3 D2 D1 D0 Addr COMMAND1 ARG1 COMMAND2 ARG2 ARG3 COMMAND3 ARG4 ARG5 COMMAND4 ARG6 ARG7 Reserved1 Reserved Reserved Reserved2 Reserved Reserved Reserved3 Reserved Reserved...
  • Page 229 AN332 To send the TX_TUNE_FREQ command and arguments, the system controller sets SEN = 0. Next, the controller drives the 9-bit control word on SDIO, consisting of the device address (A7:A5 = 101b), the write bit (0b), the device address (A4 = 0), and the register address for the COMMAND2 register (A3:A0 = 0001b). The control word is followed by a 16-bit data word, consisting of ARG2 followed by ARG3.

  • Page 230: Spi Control Interface Mode

    AN332 6.3. SPI Control Interface Mode Figures 21 and 22 show the SPI Control Interface Read and Write Timing Parameters and Diagrams, respectively. Refer to the Si471x data sheet for timing parameter values. SCLK HIGH HSDIO HSEN SDIO C6–C1 D6–D1 Control Byte In 8 Data Bytes In Figure 21.
  • Page 231 AN332 Keep SEN low until all bytes have transferred. A transaction may be aborted at any time by setting SEN high and toggling SCLK high and then low. Commands will be ignored by the device if the transaction is aborted. Table 28 demonstrates the command and response procedure that would need to be implemented in the system controller to use the SPI bus mode.

  • Page 232: Powerup

    AN332 7. Powerup There are two procedures for booting the device to move it from powerdown mode to the powerup mode. The first and most common is a boot from internal device memory. The second is a boot from a firmware patch that is written from the system controller to the device.

  • Page 233: Powerup From Device Memory

    AN332 7.1. Powerup from Device Memory Table 29. Using the POWER_UP Command for the FM Transmitter Action Data Description 0x01 POWER_UP ARG1 0x02 Set to FM Transmit. ARG2 0x50 Set to Analog Line Input.  RESP1 0x80 Reply Status. Clear-to-send high. 1.

  • Page 234: Powerup From A Component Patch

    In order to support interim updates to the device component, patches can be applied to the component by the system controller via a download mechanism. Patches can be provided by Silicon Laboratories to customers to address field issues, errata, or adjust device behavior. Patches are unique to a particular device firmware version and cannot be generated by customers.
  • Page 235 AN332 Table 34. Si4706 Firmware, Library, and Component Compatibility Firmware Library FMRX Component Part # Si4706-B20 Si4706-C30 Si4706-D50 Table 35. Si4707 Firmware, Library, and Component Compatibility Firmware Library WBRX Component Part # Si4707-B20 Table 36. Si4710/11/12/13 Firmware, Library, and Component Compatibility Firmware Library FMTX Component...
  • Page 236 AN332 Table 40. Si4749 Firmware, Library, and Component Compatibility Part # Firmware Library FMRX Component Si4749-C10 Table 41. Si4734/35 Firmware, Library, and Component Compatibility AUXIN Part # Firmware Library FMRX Component AM_SW_LWRX Component Component Si4734/35-B20 Si4734/35-C40 Si4734/35-D50 Si4734/35-D60 Table 42. Si4736/37 Firmware, Library, and Component Compatibility Part # Firmware Library...
  • Page 237 ERR (bit 6 of the one byte reply that is available after each 8-byte transfer), and halts. The part must be reset to recover from this error condition. The following is an example of a patch file. # Copyright 2006 Silicon Laboratories, Inc. # Patch generated 21:09 August 09 2006 # fmtx version 0.0 alpha...
  • Page 238 AN332 Table 45. Example POWER_UP Command with Patching Enabled Action Data Description 0x01 POWER_UP ARG1 0xCF Set to Read Library ID, Enable Interrupts. ARG2 0x50 Set to Analog Line Input.  STATUS 0x80 Reply Status. Clear-to-send high.  RESP1 0x0D Part Number, HEX (0x0D = Si4713) ...

  • Page 239: Powerdown

    AN332 8. Powerdown The procedure for moving the device from powerup to powerdown modes requires writing the POWER_DOWN command. Table 46. Using the POWER_DOWN command Action Data Description 0x11 POWER_DOWN  STATUS 0x80 Reply Status. Clear-to-send high. To Power Down the device and remove VDD and VIO (optional): 1.

  • Page 240: Digital Audio Interface

    AN332 9. Digital Audio Interface The digital audio interface operates in slave mode and supports 3 different audio data formats:  Left-Justified  DSP Mode  In I S mode, the MSB is captured on the second rising edge of DCLK following each DFS transition. The remaining bits of the word are sent in order down to the LSB.
  • Page 241 AN332 There are two additional properties each for FM Transmitter and AM/FM/SW/LW Receiver associated with using digital audio input/output. Note that digital audio is not supported in WB Receiver. For FM Transmitter: 1. Property 0x0101: DIGITAL_INPUT_FORMAT 2. Property 0x0103: DIGITAL_INPUT_SAMPLE_RATE For AM/FM/SW/LW Receiver: 1.
  • Page 242 AN332 Table 47. Digital Audio Programming Example 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x01 DIGITAL_INPUT_FORMAT or ARG3 (PROP) 0x01 or 0x02 DIGITAL_OUTPUT_FORMAT ARG4 (PROPD) 0x00 Mode: I2S, stereo, 16bit, sample on rising edge of DCLK ARG5 (PROPD) 0x00 STATUS →0x80 Reply Status.

  • Page 243: Timing

    AN332 10. Timing There are two indicators: CTS (Clear to Send) and STC (Seek/Tune Complete) to indicate that a command has been accepted and execution completed by the part. After sending every command, the CTS bit will be set indicating that the command has been accepted by the part and it is ready to receive the next command.
  • Page 244 AN332 Control COMMAND GPO2/ Figure 29. CTS and STC Timing Model The SET_PROPERTY command does not have an indicator telling when the command has completed execution, rather the timing is guaranteed and it is called t . The CTS and SET_PROPERTY command completion timing COMP model t is shown in Figure 30 and the timing parameters for each command are shown in Table 48.
  • Page 245 AN332 Table 48. Command Timing Parameters for the FM Transmitter Command COMP POWER_UP 110 ms — — POWER_DOWN — — GET_REV — — GET_PROPERTY — — GET_INT_STATUS — — PATCH_ARGS — — PATCH_DATA — — TX_ASQ_STATUS — — TX_RDS_BUFF — —...
  • Page 246 AN332 Table 49. Command Timing Parameters for the FM Receiver Command COMP POWER_UP 110 ms — — POWER_DOWN — — GET_REV — — GET_PROPERTY — — GET_INT_STATUS — — PATCH_ARGS — — PATCH_DATA — — FM_RSQ_STATUS — — 1 µs FM_RDS_STATUS 300 µs —...
  • Page 247 AN332 Table 50. Command Timing Parameters for the AM Receiver Command COMP POWER_UP 110 ms — — POWER_DOWN — — GET_REV — — GET_PROPERTY — — GET_INT_STATUS — — PATCH_ARGS — — PATCH_DATA — — 1 µs AM_RSQ_STATUS 300 µs —...
  • Page 248 AN332 Table 51. Command Timing Parameters for the WB Receiver Command COMP POWER_UP 110 ms — — POWER_DOWN — — GET_REV — — GET_PROPERTY — — GET_INT_STATUS — — PATCH_ARGS — — PATCH_DATA — — WB_RSQ_STATUS — — 1 µs WB_ASQ_STATUS 300 µs —...

  • Page 249: Fm Transmitter

    AN332 11. FM Transmitter The FM Transmitter audio signal chain involves Audio Dynamic Range Control, Pre-emphasis and Limiter function. Understanding what these three function blocks do in the signal chain will help user in maximizing the volume out of the FM Transmitter. 11.1.

  • Page 250: Audio Pre-Emphasis For Fm Transmitter

    AN332 Threshold Audio Input Audio Output Attack Release time time Figure 32. Time Domain Characteristics of the Audio Dynamic Range Controller 11.2. Audio Pre-emphasis for FM Transmitter Pre-emphasis and de-emphasis are techniques used to improve the signal-to-noise ratio of an FM stereo broadcast by reducing the effects of high-frequency noise.

  • Page 251: Audio Limiter For Fm Transmitter

    AN332 11.3. Audio Limiter for FM Transmitter A limiter is available to prevent overmodulation by dynamically attenuating the audio level such that the maximum audio deviation does not exceed the level set by the TX_AUDIO_DEVIATION property. The limiter is useful when trying to maximize the audio volume, minimize receiver-generated distortion and prevent overmodulation that may result in violating FCC and ETSI modulation limits.
  • Page 252 AN332 The audio deviation should be set as high as possible, with the constraint that the sum of the audio, pilot and RDS deviation must be 75 kHz or less. Typical settings are 66.25 kHz audio deviation, 6.75 kHz pilot deviation and 2 kHz RDS deviation.

  • Page 253: Programming Examples

    AN332 12. Programming Examples This section contains the programming example for each of the function: FM Transmit, FM Receive, AM/SW/LW Receive, and WB Receive. Before each of the example, an overview of how to program the device is shown as a flowchart.
  • Page 254 AN332 Use all default Set FM Transmit Frequency Settings? (command 0x30) Use GET_INT_STATUS (command 0x14) or hardware interrupts until Set INT settings STC bit is set Use Interrupt? (property 0x0001) Call TX_TUNE_STATUS with INTACK bit set (command 0x33) Set GPO Use GPO? (command 0x80, 0x81) Set Transmit Power...
  • Page 255 AN332 Stereo Set Pilot Deviation & Freq Mono/Stereo? (property 0x2102, 0x2107) Mono Disable Stereo components Enable Stereo components (property 0x2100) (property 0x2100) Set Audio Deviation (property 0x2101) Transmit RDS? Set RDS Deviation (Si4711/13/21 only) (property 0x2103) Disable RDS components Enable RDS components (property 0x2100) (property 0x2100) Set RDS properties...
  • Page 256 AN332 Enable Preemphasis Preemphasis? (property 0x2106) Disable Preemphasis (property 0x2106 = 2) Enable Compressor Settings Compressor? (property 0x2200-04) Disable Compressor (property 0x2200) Enable Limiter Settings Limiter? (property 0x2200, 05) Disable Limiter (property 0x2200) Set FM Transmit Frequency (command 0x30) Use GET_INT_STATUS (command 0x14) or hardware interrupts until STC bit is set...
  • Page 257 AN332 Analog/Digital Digital Set audio format Audio Input? (property 0x0101) Analog Clock must be available on DCLK/DFS pin Enable digital audio by Set ANALOG input settings setting DFS sample rate (0x2104) (property 0x0103) Monitor Audio Signal Set ASQ settings Quality (ASQ)? (property 0x2300 - 0x2304) Query TX_ASQ_STATUS (command 0x34)
  • Page 258 AN332 Need to change Disable digital audio by DCLK/DFS setting DFS sample rate to 0 Rate? (property 0x0103) (digital only) Change DCLK/DFS rate or Disable DCLK/DFS DCLK/DFS has been changed or re-enabled Enable digital audio by setting DFS sample rate (property 0x0103) Change Chip Send POWER_DOWN...
  • Page 259 AN332 Table 54. Programming Example for the FM/RDS Transmitter Action Data Description Action: To power up in analog mode, go to “Powerup in Analog Mode” (bypass “Powerup in Digital Mode”). Powerup in Digital Mode 0x01 POWER_UP (See Table 28 for patching procedure) ARG1 0xC2 Set to FM Transmit.
  • Page 260 AN332 Table 54. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x02 REFCLK_FREQ ARG3 (PROP) 0x01 ARG4 (PROPD) 0x7E REFCLK = 32500 Hz ARG5 (PROPD) 0xF4  STATUS 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1...
  • Page 261 AN332 Table 54. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x21 TX_PILOT_DEVIATION ARG3 (PROP) 0x02 ARG4 (PROPD) 0x02 6.75 kHz = 675d = 0x2A3 ARG5 (PROPD) 0xA3  STATUS 0x80 Reply Status. Clear-to-send high. Tuning 0x31 TX_TUNE_POWER...
  • Page 262 AN332 Table 54. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x01 DIGITAL_INPUT_SAMPLE_RATE ARG3 (PROP) 0x03 ARG4 (PROPD) 0xBB Sample rate = 48000Hz = 0xBB80 ARG5 (PROPD) 0x80 STATUS →0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1...
  • Page 263 AN332 Table 54. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x22 TX_ACOMP_ENABLE ARG3 (PROP) 0x00 ARG4 (PROPD) 0x00 Enable the limiter and compressor. ARG5 (PROPD) 0x03  STATUS 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1...
  • Page 264 AN332 Table 54. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x23 TX_ASQ_INTERRUPT_SELECT ARG3 (PROP) 0x00 ARG4 (PROPD) 0x00 ARG5 (PROPD) 0x07 Enable overmodulation, high and low thresholds.  STATUS 0x80 Reply Status. Clear-to-send high. 0x14 GET_INT_STATUS ...
  • Page 265 AN332 Table 54. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x30 TX_TUNE_FREQ ARG1 0x00 ARG2 0x27 Set frequency to 101.1 MHz = 10110d = 0x277E ARG3 0x7E  STATUS 0x80 Reply Status. Clear-to-send high. 0x14 GET_INT_STATUS  STATUS 0x81 Reply Status.
  • Page 266 AN332 Table 54. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x2C TX_RDS_PS_MIX ARG3 (PROP) 0x02 (Si4711/13/21 Only) ARG4 (PROPD) 0x00 Sets 50% mix of group 1A (program service) and other buffer/FIFO groups.
  • Page 267 AN332 Table 54. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x36 TX_RDS_PS (Si4711/13/21 Only) ARG1 0x00 PSID = 0 ARG2 0x53 Set text “SILA” ARG3 0x49 Complete text is ARG4 0x4C “SILABS SI471X RDS DEMO” ARG5 0x41 ...
  • Page 268 Set Group 2A, Text Location 0 ARG3 0x00 Set text “SILI” ARG4 0x53 ARG5 0x49 Complete text is ARG6 0x4C “SILICON LABORATORIES SI471X RDS DEMO” ARG7 0x49  STATUS 0x80 Reply Status. Clear-to-send high. 0x35 TX_RDS_BUFF (Si4711/13/21 Only) ARG1 0x04...
  • Page 269 Set Group 2A, Text Location 5 ARG3 0x05 Set text “SI4” ARG4 0x20 ARG5 0x53 Complete text is ARG6 0x49 “SILICON LABORATORIES SI471X RDS DEMO” ARG7 0x34  STATUS 0x80 Reply Status. Clear-to-send high. 0x35 TX_RDS_BUFF (Si4711/13/21 Only) ARG1 0x04...
  • Page 270 AN332 Table 54. Programming Example for the FM/RDS Transmitter (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x21 TX_COMPONENT_ENABLE ARG3 (PROP) 0x00 (Si4711/13/21 Only) ARG4 (PROPD) 0x00 Enable (Stereo) LMR, Pilot and RDS. ARG5 (PROPD) 0x07  STATUS 0x80 Reply Status.

  • Page 271: Programming Example For The Fm/Rds Receiver

    AN332 12.2. Programming Example for the FM/RDS Receiver The following is a flowchart showing the overview of how to program the FM/RDS Receiver. RESET CHIP STATE: POWER DOWN Check Chip Library ID Power Up POWER_UP with FUNC=15 With Patch? (command 0x01) Library ID Contact Silabs POWER UP with...
  • Page 272 AN332 Use all default Set FM Tune Frequency Settings? (command 0x20) Use GET_INT_STATUS (command 0x14) or hardware interrupts Set INT settings Until STC bit is set Use Interrupt? (property 0x0001) Call FM_TUNE_STATUS With INTACK bit set (command 0x22) Set GPO Use GPO? (command 0x80, 0x81) CHIP STATE:...
  • Page 273 AN332 S e t D e e m p h a s is ( p r o p e r ty 0 x 1 1 0 0 ) S e t M o n o /S te r e o B le n d s e tt in g s ( p r o p e r ty 0 x 1 8 0 0 –...
  • Page 274 AN332 Receive RDS? Set FM_RDS_INT_SOURCE (Si4706/41/43/45/49 (property 0x1500) only) FM_RDS_INT_FIFO_COUNT Disable RDS in (property 0x1501) FM_RDS_CONFIG (property 0x1502) Set FM_RDS_CONFIG & enable RDS (property 0x1502) Received RDS Interrupt or poll RDSINT from GET_INT_STATUS Read RDS data with FM_RDS_STATUS (command 0x24) LOOP until RDS FIFO is empty...
  • Page 275 AN332 M o n ito r R e c e iv e d S e t R S Q s e ttin g s Y e s S ig n a l Q u a lity (R S Q ) ? ( p ro p e rty 0 x 1 2 0 0 - 0 x 1 2 0 7 ) Q u e ry F M _ R S Q _ S T A T U S (c o m m a n d 0 x 2 3 )
  • Page 276 AN332 Need to change DCLK/DFS Disable digital audio by Rate? setting DFS sam ple rate to 0 (digital only) (property 0x0104) Change DCLK/DFS rate or Disable DCLK/DFS DCLK/DFS has been changed or re-enabled Enable digital audio by setting DFS sample rate (property 0x0104) Change Chip Function to AM /SW /LW/W B...
  • Page 277 AN332 Table 55 provides an example for the FM/RDS Receiver. The table is broken into three columns. The first column lists the action taking place: command (CMD), argument (ARG), status (STATUS) or response (RESP). For SET_PROPERTY commands, the property (PROP) and property data (PROPD) are indicated. The second column lists the data byte or bytes in hexadecimal that are being sent or received.
  • Page 278 AN332 Table 55. Programming Example for the FM/RDS Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x00 GPO_IEN ARG3 (PROP) 0x01 ARG4 (PROPD) 0x00 Set STCIEN, ERRIEN, CTSIEN, RSQIEN ARG5 (PROPD) 0xC9  STATUS 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1...
  • Page 279 AN332 Table 55. Programming Example for the FM/RDS Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x18 FM_BLEND_RSSI_STEREO_THRESHOLD ARG3 (PROP) 0x00 ARG4 (PROPD) 0x00 Threshold = 49dBµV = 0x0031 ARG5 (PROPD) 0x31  STATUS 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1...
  • Page 280 AN332 Table 55. Programming Example for the FM/RDS Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x12 FM_RSQ_RSSI_HI_THRESHOLD ARG3 (PROP) 0x03 ARG4 (PROPD) 0x00 Threshold = 50 dBµV = 0x0032 ARG5 (PROPD) 0x32  STATUS 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1...
  • Page 281 AN332 Table 55. Programming Example for the FM/RDS Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x14 FM_SEEK_BAND_TOP ARG3 (PROP) 0x01 ARG4 (PROPD) 0x2A Top Freq = 107.9 MHz = 0x2A26 ARG5 (PROPD) 0x26  STATUS 0x80 Reply Status.
  • Page 282 AN332 Table 55. Programming Example for the FM/RDS Receiver (Continued) Action Data Description 0x23 FM_RSQ_STATUS ARG1 0x01 Clear RSQINT  STATUS 0x80 Reply Status. Clear-to-send high.  RESP1 0x00 No blend, SNR high, low, RSSI high or low interrupts.  RESP2 0x01 Soft mute is not engaged, no AFC rail, valid frequency.
  • Page 283 AN332 Table 55. Programming Example for the FM/RDS Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2(PROP) 0x15 FM_RDS_CONFIG ARG3(PROP) 0x02 ARG4(PROPD) 0xEF Set Block Error A,B,C,D to 3,2,3,3 ARG5(PROPD) 0x01 Enable RDS STATUS →0x80 Reply Status. Clear-to-send high 0x14 GET_INT_STATUS STATUS...
  • Page 284 AN332 Table 55. Programming Example for the FM/RDS Receiver (Continued) Action Data Description FM_RDS_STATUS 0x24 Clear RDS interrupt. ARG1 0x01 Reply Status. Clear-to-send (CTS) high. Seek/Tune STATUS →0x80 Complete (STCINT) high. Interrupt source: RDS received. RESP1 →0x01 RDS Synchronized. No lost data. RESP2 →0x01 RDS FIFO Used: 0x15 = 21.
  • Page 285 AN332 Table 55. Programming Example for the FM/RDS Receiver (Continued) Action Data Description FM_RDS_STATUS 0x24 Clear RDS interrupt. ARG1 0x01 Reply Status. Clear-to-send (CTS) high. Seek/Tune STATUS →0x80 Complete (STCINT) high. Interrupt source: RDS received. RESP1 →0x01 RDS Synchronized. No lost data. RESP2 →0x01 RDS FIFO Used: 0x14 = 20.
  • Page 286 AN332 Table 55. Programming Example for the FM/RDS Receiver (Continued) Action Data Description FM_RDS_STATUS 0x24 Clear RDS interrupt. ARG1 0x01 Reply Status. Clear-to-send (CTS) high. Seek/Tune STATUS →0x80 Complete (STCINT) high. Interrupt source: RDS received. RESP1 →0x01 RDS Synchronized. No lost data. RESP2 →0x01 RDS FIFO Used: 0x13 = 19.
  • Page 287 RESP9 →0x49 Block D: 0x4553 →ES RESP10 →0x45 RESP11 →0x53 BLE: 0 (No Error) RESP12 →0x00 Current RT: “SILICON LABORATORIES” FM_RDS_STATUS 0x24 Clear RDS interrupt. ARG1 0x01 Reply Status. Clear-to-send (CTS) high. Seek/Tune STATUS →0x80 Complete (STCINT) high. Interrupt source: RDS received.
  • Page 288 RESP9 →0x53 Block D: 0x4934 →I4 RESP10 →0x49 RESP11 →0x34 BLE: 0 (No Error) RESP12 →0x00 Current RT: “SILICON LABORATORIES SI4” FM_RDS_STATUS 0x24 Clear RDS interrupt. ARG1 0x01 Reply Status. Clear-to-send (CTS) high. Seek/Tune STATUS →0x80 Complete (STCINT) high. Interrupt source: RDS received.
  • Page 289 RESP9 →0x31 Block D: 0x5820 →x RESP10 →0x58 RESP11 →0x20 BLE: 0 (No Error) RESP12 →0x00 Current RT: “SILICON LABORATORIES SI471x ” FM_RDS_STATUS 0x24 Clear RDS interrupt. ARG1 0x01 Reply Status. Clear-to-send (CTS) high. Seek/Tune STATUS →0x80 Complete (STCINT) high.
  • Page 290 RESP9 →0x44 Block D: 0x5320 →S RESP10 →0x53 RESP11 →0x20 BLE: 0 (No Error) RESP12 →0x00 Current RT: “SILICON LABORATORIES SI471x RDS” FM_RDS_STATUS 0x24 Clear RDS interrupt. ARG1 0x01 Reply Status. Clear-to-send (CTS) high. Seek/Tune STATUS →0x80 Complete (STCINT) high.
  • Page 291 →0x45 Block D: 0x4D4F →MO RESP10 →0x4D RESP11 →0x4F BLE: 0 (No Error) RESP12 →0x00 Current RT: “SILICON LABORATORIES SI471x RDS DEMO” FM_RDS_STATUS 0x24 Clear RDS interrupt. ARG1 0x01 Reply Status. Clear-to-send (CTS) high. Seek/Tune STATUS →0x80 Complete (STCINT) high.
  • Page 292 Block D: 0x0000 → ‘NUL’ ‘NUL’ RESP10 →0x00 RESP11 →0x00 BLE: 0 (No Error) RESP12 →0x00 Current RT: “SILICON LABORATORIES SI471x RDS DEMO” - continue sending FM_RDS_STATUS until FIFO empty - 0x11 POWER_DOWN  STATUS 0x80 Reply Status. Clear-to-send high.

  • Page 293: Programming Example For The Am/Lw/Sw Receiver

    AN332 12.3. Programming Example for the AM/LW/SW Receiver The following flowchart shows an overview of how to program the AM/LW/SW receiver. RESET CHIP STATE: POWER DOWN Check Chip Library ID Power Up POWER_UP with FUNC=15 With Patch? (command 0x01) Library ID POWER UP with Contact Silabs Compatible...
  • Page 294 AN332 Use all default Set AM Tune Frequency Settings? (command 0x40) Use GET_INT_STATUS (command 0x14) or hardware interrupts Set INT settings Until STC bit is set Use Interrupt? (property 0x0001) Call AM_TUNE_STATUS With INTACK bit set (command 0x42) Set GPO Use GPO? (command 0x80, 0x81) CHIP STATE:...
  • Page 295 AN332 S e t A M _ D E E M P H A S I S ( p r o p e r t y 0 x 3 1 0 0 ) S e t A M _ C H A N N E L _ F I L T E R ( p r o p e r t y 0 x 3 1 0 2 ) S e t S o f t M u t e S e t t in g s ( p r o p e r t y 0 x 3 3 0 1 - 3 3 0 3 )
  • Page 296 AN332 Monitor Received Set RSQ settings Signal Quality (RSQ)? (property 0x3200 - 0x3204) Query AM_RSQ_STATUS (command 0x43) Optional: Do something based on AM_RSQ_STATUS SEEK next Set SEEK settings Valid channel? (property 0x3400-3404) SEND AM_SEEK_START (COMMAND 0X41) CHIP STATE: RECEIVING AM / SW / LW SCAN AM/SW/LW Set SEEK settings Band...
  • Page 297 AN332 Change Chip Function To FM Receive or Weather Band? Repeat any of the RECEIVE instructions above after AM / SW / LW POWER_UP state DONE? To change settings Send POWER_DOWN Send POWER_DOWN (command 0x11) (command 0x11) CHIP STATE: CHIP STATE: POWER DOWN POWER DOWN Go back to the very first...
  • Page 298 AN332 Table 56 provides an example of programming the AM/LW/SW receiver. The table is broken into three columns. The first column lists the action taking place: command (CMD), argument (ARG), status (STATUS) or response (RESP). For SET_PROPERTY commands, the property (PROP) and property data (PROPD) are indicated. The second column lists the data byte or bytes in hexadecimal that are being sent or received.
  • Page 299 AN332 Table 56. Programming Example for the AM/LW/SW Receiver (Continued) Action Data Description 0x10 GET_REV  STATUS 0x80 Reply Status. Clear-to-send high.  RESP1 0x1F Part Number, HEX (0x1F = 31 dec. = Si4731)  RESP2 0x32 Firmware Major Rev, ASCII (0x32 = 2) ...
  • Page 300 AN332 Table 56. Programming Example for the AM/LW/SW Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x31 AM_DEEMPHASIS ARG3 (PROP) 0x00 ARG4 (PROPD) 0x00 50 µs ARG5 (PROPD) 0x01  STATUS 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1 0x00...
  • Page 301 AN332 Table 56. Programming Example for the AM/LW/SW Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x33 AM_SOFT_MUTE_MAX_ATTENUATION ARG3 (PROP) 0x02 ARG4 (PROPD) 0x00 ARG5 (PROPD) 0x0A 10 dB attenuation = 0x0A  STATUS 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1...
  • Page 302 AN332 Table 56. Programming Example for the AM/LW/SW Receiver (Continued) Action Data Description 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x34 AM_SEEK_RSSI_THRESHOLD ARG3 (PROP) 0x04 ARG4 (PROPD) 0x00 0x002A = 42 dBµV ARG5 (PROPD) 0x2A  STATUS 0x80 Reply Status. Clear-to-send high. 0x40 AM_TUNE_FREQ ARG1...

  • Page 303: Programming Example For The Wb/Same Receiver

    AN332 The device sets the CTS bit (and optional interrupt) to indicate that it is ready to accept the next command. The CTS bit also indicates that the POWER_UP, GET_REV, POWER_DOWN, GET_PROPERTY, GET_INT_STATUS, AM_TUNE_STATUS, and AM_RSQ_STATUS commands have completed execution. When performing a AM_TUNE_FREQ or AM_SEEK_START CTS will indicate that the device is ready to accept the next command even though the operation is not complete.
  • Page 304 AN332 Use all default Set W B Tune Frequency Settings? (com m and 0x50) Use GET_INT_STATUS (comm and 0x14) or hardware interrupts until Set INT settings STC bit is set Use Interrupt? (property 0x0001) Call W B_TUNE_STATUS with INTACK bit set (com m and 0x52) Set GPO Use GPO ?
  • Page 305 AN332 S e t W B M a x T u n e E r r o r ( p r o p e r t y 0 x 5 1 0 8 ) S e t W B V a lid S N R T h r e s h o ld ( p r o p e r t y 0 x 5 4 0 3 ) S e t W B V a lid R S S I...
  • Page 306 AN332 Monitor Received Set RSQ settings Signal Quality (RSQ)? (property 0x5200 - 0x5204) Query WB_RSQ_STATUS (command 0x53) Optional: Do something based on WB_RSQ_STATUS Monitor Alert Tone Set ASQ int source (ASQ)? (property 0x5600) Query WB_ASQ_STATUS (command 0x55) Optional: Do something based on WB_ASQ_STATUS Set SAME int source...
  • Page 307 AN332 Change Chip Function Send POWER_DOWN To AM or FM? (command 0x11) CHIP STATE: POWER DOWN Repeat any of the instructions above after RECEIVE WB POWER_UP state DONE? To change settings Send POWER_UP For AM or FM Receive (command 0x01) Send POWER_DOWN (command 0x11) CHIP STATE:...
  • Page 308 AN332 For detailed information on SAME processing, please refer to the following flow chart: Start Call Set GPO_IEN WB_SAME_STATUS for SAME and INT_ACK = 1 ALERT Tone Interrupts = 0x06 EOM_DET Configure = 1? SAME Interrupts for HDR_RDY, EOM_DET, and PRE_DET WB_SAME_INTERRUPT Source = 0x0B...
  • Page 309 AN332 Table 57 provides an example for the WB Receiver. The table is broken into three columns. The first column lists the action taking place: command (CMD), argument (ARG), status (STATUS) or response (RESP). For SET_PROPERTY commands, the property (PROP) and property data (PROPD) are indicated. The second column lists the data byte or bytes in hexadecimal that are being sent or received.
  • Page 310 AN332 Table 57. Programming Example for the WB/SAME Receiver (Continued) 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP) 0x40 RX_VOLUME ARG3 (PROP) 0x00 ARG4 (PROPD) 0x00 Output Volume = 63 ARG5 (PROPD) 0x3F STATUS → 0x80 Reply Status. Clear-to-send high. 0x12 SET_PROPERTY ARG1 0x00 ARG2 (PROP)
  • Page 311 AN332 Table 57. Programming Example for the WB/SAME Receiver (Continued) 0x14 GET_INT_STATUS STATUS → 0x81 Reply Status. Clear-to-send high. STCINT = 1. 0x52 WB_TUNE_STATUS ARG1 0x01 Clear STC interrupt. STATUS → 0x80 Reply Status. Clear-to-send high. RESP1 → 0x01 Valid Frequency. RESP2 →...

  • Page 312: Si4704/05/3X-D60

    AN332 A—C Si4704/05/3 -B20, PPENDIX OMPARISON OF THE Si4704/05/3 -C40, Si4704/05/3 -D60 This appendix describes the configuration, command, and property differences between silicon and firmware revisions of the Si4704/05/3x-B20, Si4704/05-3x-C40, and Si4704/05/3x-D60 devices. Each revision is referred to by its die revision and firmware revision suffix according to Table 1. For a more detailed configuration reference, consult “AN332: Si47xx Programming Guide”.
  • Page 313 AN332 Each of the following subsections describes the differences between revisions for groups of properties and/or commands. Each property is listed as PROPERTY_NAME (number) = default (supported revisions). Hexadecimal values are immediately preceded by “0x”; all other numeric values are decimal. AM, FM, and WB errata on -B20 have been addressed in -C40 and/or -D60 devices.
  • Page 314 AN332 FM_BLEND_MULTIPATH_MONO_THRESHOLD (0x1809) = 60 (-D60) FM_BLEND_MULTIPATH_ATTACK_RATE (0x180A) = 4000 (-D60) FM_BLEND_MULTIPATH_RELEASE_RATE (0x180B) = 40 (-D60) In -B20 and -C40, FM stereo blend is only determined by RSSI based on blend thresholds set in 0x1105 and 0x1106. In -D60 devices, a series of advanced blend properties have been added to improve the user experience under dynamic signal conditions.
  • Page 315 AN332 AM Properties The properties and commands in this section are related to AM mode. AM Mode Configuration (0x310x Properties) AM_MODE_AVC_MAX_GAIN (0x3103) = 0x1543 (-C40, -D60) AM_MODE_AFC_SW_PULL_IN_RANGE (0x3104) = 8695 (-C40, -D60) AM_MODE_AFC_SW_LOCK_IN_RANGE (0x3105) = 11765 (-C40, -D60) AM_MODE_AVC_MAX_GAIN is available in -C40 and -D60 devices with a default max gain of 16 dB. In -B20, the AVC gain is set at maximum and not available through a property.

  • Page 316: Appendix B-Si4704/05/3X-B20/-C40/-D60 Compatibility Checklist

    AN332 B—Si4704/05/3 -B20/-C40/-D60 C PPENDIX OMPATIBILITY HECKLIST This appendix describes the configuration differences between hardware revisions of Si4704/05/3x devices. It describes how to achieve backwards compatibility between systems designed for Si4704/05/3x-B20, -C40, and - D60 device hardware revisions. It is not intended as a complete reference to Si4704/05/3x configuration. For an in- depth configuration reference, consult “AN332: Si47xx Programming Guide”.
  • Page 317 AN332 To Achieve Similar Performance in SI4704/05/3X-D60 to SI4704/05/3X-C40 The -D60 devices have a more advanced feature set than -C40 devices. This section describes a step-by-step procedure to achieve similar performance from -D60 devices to that of -C40 devices by modifying or disabling some of the advanced features.
  • Page 318 AN332 AM Receive Mode Set the AM_MODE_AVC_MAX_GAIN property (0x3103) to 0x7800.  Set the AM_SOFT_MUTE_THRESHOLD property (03303) to 10.  Set the AM_SOFT_MUTE_SLOPE property (0x3301) to 2  Set the AM_SOFT_MUTE_MAX_ATTENUATION property (0x3302) to 16.  WB Receive Mode There are no Si473x-D60 devices which support WBRX mode. To Achieve Similar Performance in Si4704/05/3X-C40 to Si4704/05/3X-B20 This section describes a step-by-step procedure to achieve performance from -C40 devices that is similar to that of -B20 devices.

  • Page 319: Document Change List

    AN332 Revision 0.7 to Revision 0.8 OCUMENT HANGE Corrected pin numbers of LIN and RIN for  Revision 0.1 to Revision 0.2 Si4704/05/3x-D60 parts. Updated Product Matrix in Table 1. Added more explanations to property 0x1900 and   0x3103. Added Si4706 FM and High-Performance RDS ...

  • Page 320: Contact Information

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