Soic Package, Programming/Debug Mode - Silicon Laboratories Si4010-C2 Manual

6.4. SOIC Package, Programming/debug Mode

VPP/GPIO0/XTAL
Pin Name
Number(s)
1
2
3
4,5
6
7,8
9
10
11,12,13
14
GPIO9 1
2
GND 3
Si4010-GS
TXM 4
TXP 5
VDD 6
GPIO7 7
Description
GPIO9 General purpose input/output pin
VPP +6.5 V required for NVM (OTP) Memory programming
GND Ground. Connect to ground plane on PCB
TXM, TXP Transmitter differential outputs
VDD Power
GPIO[7:6] General purpose input/output pins
C2CLK C2 clock interface
C2DAT C2 data input/output pin
GPIO[4:1] General purpose input/output pins
GPIO8 General purpose input/output pin
Rev. 1.0
Si4010-C2
14 GPIO8
13 GPIO1
12 GPIO2
11 GPIO3
10 C2DAT/GPIO4
9 C2CLK/LED
8 GPIO6
21