Silicon Laboratories Si4010-C2 Manual page 7

Si4010-C2
L T
I S T OF ABLES
Table 4.1. Product Selection Guide ..........................................................................................15
Table 1. Top Marking Explanation ............................................................................................ 16
Table 2. Top Marking Explanation ............................................................................................ 17
Table 7.1. Package Dimensions ............................................................................................... 22
Table 7.2. Package Dimensions ............................................................................................... 23
Table 8.1. 10-Pin MSOP Dimensions ....................................................................................... 25
Table 9.1. PCB Land Pattern Dimensions ................................................................................ 27
Table 10.1. Recommended Operating Conditions ................................................................... 28
1 2
Table 10.2. Absolute Maximum Ratings , .............................................................................. 28
Table 10.3. DC Characteristics ................................................................................................29
Table 10.4. Si4010 RF Transmitter Characteristics ................................................................. 30
Table 10.5. Low Battery Detector Characteristics .................................................................... 31
Table 10.6. Optional Crystal Oscillator Characteristics ............................................................ 31
Table 10.7. EEPROM Characteristics ...................................................................................... 32
Table 10.8. Low Power Oscillator Characteristics .................................................................... 32
Table 10.9. Sleep Timer Characteristics .................................................................................. 32
Table 22.1. CIP-51 Instruction Set Summary ........................................................................... 57
Table 24.1. Boot XDATA Status Variables ............................................................................... 76
Table 24.2. Run Chip Retest Protection Flags: NVM Programmer .......................................... 81
Table 25.1. Special Function Register (SFR) Memory Map ..................................................... 85
Table 25.2. Special Function Registers .................................................................................... 86
Table 25.3. XREG Register Memory Map in External Memory ................................................89
Table 25.4. XREG Registers .................................................................................................... 90
Table 26.1. Interrupt Summary .................................................................................................93
Table 30.1. 10-Pin Mode .......................................................................................................109
Table 30.2. 14-Pin Mode .......................................................................................................109
Table 30.3. GPIO Special Roles ............................................................................................ 111
Table 30.4. GPIO Special Roles Control and Order ............................................................... 116
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