Table 30.1. 10-Pin Mode; Table 30.2. 14-Pin Mode - Silicon Laboratories Si4010-C2 Manual

Pin assignments for 10– and 14–pin packages are shown in Table 30.1 and Table 30.2.
The GPIO Port I/O can be configured as either open-drain or push-pull in SFR registers P0CON and
P1CON.
The GPIO functional diagrams and related digital control are in Figure 30.2 and Figure 30.3.
The option for Matrix mode is available only on GPIO[3:1] and the option for Roff mode is available only on
GPIO[2:1].
Table 30.1. 10–Pin Mode
Package Pin Package Pin
Number Name
1 GPIO0/XO
10 GPIO1
9 GPIO2
8 GPIO3
7 GPIO4
6 GPIO5/LED
Table 30.2. 14–Pin Mode
Package Pin Package Pin
Number Name
2 GPIO0/XO
13 GPIO1
12 GPIO2
11 GPIO3
10 GPIO4
9 GPIO5/LED
8 GPIO6
7 GPIO7
14 GPIO8
1 GPIO9
Rev. 1.0
Si4010-C2
109