Memory Organization; Figure 23.1. Address Space Map After The Boot - Silicon Laboratories Si4010-C2 Manual

23. Memory Organization

The memory organization of the Si4010 is similar to that of a standard 8051. There are two separate mem-
ory spaces: program memory and data memory. Program and data memory share the same address
space but are accessed via different instruction types. However, this device is unique since it has the pro-
gram and data memory spaces combined into one. This is called a unified CODE and XDATA memory.
The device has a standard 8051 program and data address configuration. It includes 256 bytes of internal
data RAM, with the upper 128 bytes dual-mapped. Indirect addressing accesses the upper 128 bytes of
general purpose RAM, and direct addressing accesses the 128 byte SFR address space. The lower 128
bytes of internal RAM are accessible via direct and indirect addressing. The first 32 bytes are addressable
as four banks of general purpose registers, and the next 16 bytes can be byte addressable or bit address-
able.
Apart from the CPU core related internal memory, the device has the following memories:
4.5 kB of RAM .. it can be used both as program CODE and external data XDATA memory

12 kB of ROM .. it holds the Silicon Labs provided API (Application Programming Interface) routines.

The ROM is not readable by the user.
256B hardware control registers mapped to XDATA address space (XREG)

8 kB of one time programmable (OTP) non-volatile memory (NVM)

128 bits of multiple time programmable (MTP) EEPROM. The EEPROM has an endurance of 50,000

updates per bit.
See Figure 23.1 for the MCU system memory map:
XDATA
0x0000
RAM 4.5K
0x11FF
0x4000
0x8000
ROM 12K
0xAFFF
0xFFFF

Figure 23.1. Address Space Map after the Boot

MCU view of unified RAM address space
CODE/
XDATA
0x0000
0x4000
XREG
0x40FF
0x8000
0xC000
0xFFFF
Rev. 1.0
Si4010-C2
DATA/IDATA
0x00
Registers
Lower 128 RAM
0x1F
0x20
bytes,
Bit
Addressable Direct and Indirect
0x2F
Addressing
0x30
Direct &
Inidirect
Addressing
0x7F
0x80
Upper 128
SFR
(DATA)
Direct Addressing
Indirect Addressing
Only
0xFF
NVM (OTP) 8K
MTP (EEPROM)
128 bits
0x80
RAM
Only
0xFF
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