Si4010-C2
SFR Definition 28.1. GFM_DATA
Bit
7
Name
R/W
R/W
Type
0
Reset
SFR Address = 0x84
Bit
Name
GFM Multiplier Data Processing.
Writing of a value here registers the data for processing. Processed data is regis-
GFM_DATA
7:0
tered into the same register with single CLK_SYS cycle delay. Read from this reg-
[7:0]
ister reads the processed multiplied data. The register GFM_CONST must be
written before GFM_DATA is written.
SFR Definition 28.2. GFM_CONST
Bit
7
Name
R/W
R/W
Type
0
Reset
SFR Address = 0x85
Bit
Name
GFM Multiplier Constant Register.
GFM_CONST
7:0
This is the constant by which the GFM_DATA is multiplied by. It has to be written
[7:0]
prior to GFM_DATA.
104
6
5
4
GFM_DATA[7:0]
R/W
R/W
0
0
0
6
5
4
GFM_CONST[7:0]
R/W
R/W
0
0
0
Rev. 1.0
3
2
R/W
R/W
R/W
0
0
Function
3
2
R/W
R/W
R/W
0
0
Function
1
0
R/W
0
0
1
0
R/W
0
0
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