Sfr Definition 34.1. Tmr_Clksel - Silicon Laboratories Si4010-C2 Manual

SFR Definition 34.1. TMR_CLKSEL

Bit 7
TMR3H_MODE
Name
R/W
Type
0
Reset
SFR Address = 0xC9
Bit Name
Timer 3 High Byte Mode Select.
Timer 3 high half in split mode. Ignored if Timer 3 is in wide mode.
TMR3H_
00: CLK_SYS
MODE
7:6
01: CLK_SYS/12
10: RTC_TICK = 5.33 µs
11: RTC_PULSE = 100 µs
Timer 3 Low Byte Mode Select.
Timer 3 low half in split mode or full timer in wide mode clock selection.
TMR3L_
00: CLK_SYS
5:4
MODE
01: CLK_SYS/12
10: RTC_TICK = 5.33 µs
11: RTC_PULSE = 100 µs
Timer 2 High Byte Mode Select.
Timer 2 high half in split mode. Ignored if Timer 2 is in wide mode.
TMR2H_
00: CLK_SYS
3:2
MODE
01: CLK_SYS/12
10: RTC_TICK = 5.33 µs
11: RTC_PULSE = 100 µs
Timer 2 Low Byte Mode Select.
Timer 2 low half in split mode or full timer in wide mode clock selection.
TMR2L_
00: CLK_SYS
1:0
MODE
01: CLK_SYS/12
10: RTC_TICK = 5.33 µs
11: RTC_PULSE = 100 µs
6 5 4
TMR3L_MODE
R/W
0 0 0
Rev. 1.0
3 2
TMR2H_MODE
R/W
0 0
Function
Si4010-C2
1 0
TMR2L_MODE
R/W
0 0
139