Sfr Definition 26.4. Eip1 - Silicon Laboratories Si4010-C2 Manual

SFR Definition 26.4. EIP1

Bit 7
Reserved
Name
R
Type
Reset
SFR Address = 0xF6
Bit Name
7:5 Reserved Read as 0x0. Write has no effect.
VOID1 Interrupt Priority Control.
This bit sets the priority of the VOID1 interrupt.
4 PVOID1
0: VOID1 interrupt set to low priority level.
1: VOID1 interrupt set to high priority level.
VOID0 Interrupt Priority Control.
This bit sets the priority of the VOID0 interrupt.
3 PVOID0
0: VOID0 interrupt set to low priority level.
1: VOID0 interrupt set to high priority level.
Frequency Counter Interrupt Priority Control.
This bit sets the priority of the Frequency Counter interrupt.
2 PFC
0: Frequency Counter interrupt set to low priority level.
1: Frequency Counter interrupt set to high priority level.
1:0 Reserved Reset value 0x0 must not be changed.
6 5 4
PVOID1
R/W
0 0
Rev. 1.0
Si4010-C2
3 2
PVOID0 PFC
R/W R/W
0 0
Function
1 0
Reserved
R/W
0
97