Reset; Chip Program Levels - Silicon Laboratories Si4010-C2 Manual

Si4010-C2

24.2. Reset

Reset circuitry allows the controller to be easily placed in a predefined default condition. See "Reset
Sources" on page 106 for details.

24.3. Chip Program Levels

The boot process starts by reading the NVM configuration bytes in the Factory region of NVM. The infor-
mation about the programmed level of the chip is read first and the boot process acts accordingly.
After boot, the program level of the chip can be read as NVM_BLOWN[2:0] field in the PROT0_CTRL 
register.
From user point of view there are 3 program levels of the chip:
1. Factory .. blank part leaving the factory. The factory chip calibration is written into NVM. ROM and
NVM Factory region is not readable by the user. Part can be used with debugging chain for software
development and User load can be programmed to the part. Boot process initializes the part based on
the Factory settings.
2. User .. same as Factory (blank) part, but with the User region in the NVM programmed with user code.
The boot process will initialize the part according to the Factory settings and then (see Note 1. in
section "24.5. Device Boot Process") copies the User load to the CODE/XDATA or IRAM based on the
User load. The code is not automatically run (see Note 2. in section "24.5. Device Boot Process"). The
part can be used with IDE for further software development. The part is still opened for further NVM
programming and the user can add additional data to the User region in the NVM. Debugging of the
code loaded from NVM is possible. The user can modify the boot behavior of the User part by
controlling two bits described later in the boot sequence description.
This program level can be used two ways:
User programs the User code to check the load before finalizing the product.

Silicon Labs program most of the User code into the chip. Then the customer will add additional

information specific for each chip on his own. For example, the customer may chose to let Silicon
Labs program all the application data, but wants to program security keys into each chip on their
own. This User level would be the chip program level delivered to a customer.
3. Run .. mission mode part, fully programmed for use in the field. No further NVM programming possible,
no C2 interface access enabled, with the exception of special mode for retest. No possibility of IDE
debug. The boot process is the same as in the case of User part, but after the user load is copied from
NVM to RAM, the boot loader executes a jump to RAM address 0x0000 and the user application is
executed. The C2 is not enabled in this mode with the retest exception, briefly described in this
document.
The IDE debugging environment can be used only with the Factory and User program chip levels, not with
the Run part.
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