ABB Relion Technical Manual page 360

Section 12
Control
354
voltage difference between bus and line is acceptable, the measured values are also
compared with the set values for acceptable frequency FreqDiffMax and FreqDiffMin,
rate of change of frequency FreqRateChange and phase angle, which has to be smaller
than the internally preset value of 15 degrees.
Measured frequencies between the settings for the maximum and minimum frequency
will initiate the measuring and the evaluation of the angle change to allow operation to be
sent in the right moment including the set tBreaker time. There is a phase angle release
internally to block any incorrect closing pulses. At operation the SYNOK output will be
activated with a pulse tClosePulse and the function reset. The function will also reset if the
syncronizing conditions are not fulfilled within the set tMaxSynch time. This prevents that
the function is, by mistake, maintained in operation for a long time, waiting for conditions
to be fulfilled.
The inputs BLOCK and BLKSYNCH are available for total block of the complete
SESRSYN function and block of the Synchronizing function respectively. TSTSYNCH
will allow testing of the function where the fulfilled conditions are connected to a separate
output.
SYN1
OPERATION SYNCH=ON
TEST MODE=ON
STARTSYN
BLKSYNCH
OR
Voltage difference between
V-Bus and V-Line < 0.10 p.u
Bus voltage > 80% of
GblBaseSelBus
AND
Line voltage > 80% of
GblBaseSelLine
FreqDiffMax
FreqDiffMin
FreqRateChange
fBus&fLine ± 5 Hz
PhaseDiff < 15 deg
PhaseDiff=closing angle
FreqDiff
Close pulse
in advace
tBreaker
ANSI08000020 V3 EN
Figure 165: Simplified logic diagram for the synchronizing function
S
AND
R
AND
50 ms
0
AND
0.05-tClosePulse
AND
0
AND
0-tMaxSynch
1MRK 502 048-UUS A
SYNPROGR
AND
SYNOK
OR
TSTSYNOK
OR
SYNFAIL
0
ANSI08000020-3-en.vsd
Technical manual