Congatec COM Express conga-TR3 User Manual page 68

Bus Number (hex) Device Number (hex)
00h 08h
00h 09h
00h 09h
00h 10h
00h 11h
00h 12h
00h 14h
00h 14h
00h 14h
00h 18h
00h 18h
00h 18h
00h 18h
00h 18h
00h 18h
01h (see Note 3) 00h
02h (see Note 3) 00h
03h (see Note 3) 00h
04h (see Note 3) 00h
05h (see Note 3) 00h
06h (see Note 3) 00h
07h (see Note 3) 00h
Note
1. The PCI Express Ports may only be visible if the PCI Express Port is set to "Enabled" in the BIOS setup program and a device is attached
to the corresponding PCI Express port on the carrier board.
2. The PCI Express Graphics Ports may only be visible if the PCI Express Graphics Port is set to "Enabled" in the BIOS setup program and a
device is attached to the corresponding PCI Express port on the carrier board.
3. The above table represents a case when a single function PCI Express device is connected to all possible slots on the carrier board. The
given bus numbers will change based on actual hardware configuration.
Copyright © 2016 congatec AG
Function Number (hex) PCI Interrupt
Routing
00h Internal
00h N.A
02h Internal
00h Internal
00h Internal
00h Internal
00h N.A.
03h N.A.
07h Internal
00h N.A.
01h N.A.
02h N.A.
03h N.A.
04h N.A.
05h N.A.
00h Internal
00h Internal
00h Internal
00h Internal
00h Internal
00h Internal
00h Internal
TR33m10
Description
AMD PSP Controller
AMD Audio Controller Host Bridge
AMD Audio Controller
XHCI Host Controller
Serial ATA Controller
EHCI Host Controller
SMBus Host Controller
PCI to LPC Bridge
SD Controller
Chipset Configuration Registers
Chipset Configuration Registers
Chipset Configuration Registers
Chipset Configuration Registers
Chipset Configuration Registers
Chipset Configuration Registers
Onboard Gigabit LAN Controller
PCI Express Port 0
PCI Express Port 1
PCI Express Port 2
PCI Express Port 3
PCI Express Graphics Port 0
PCI Express Graphics Port 1
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