Xilinx KCU105 User Manual page 70

Table 1-23 shows the FMC HPC J22 to the XCKU040 device U1 connections in FMC
connector section pairs.
Table 1-23: FMC HPC J22 Connections to XCKU040 Device U1
J22
Schematic Net Name
Pin
A2 FMC_HPC_DP1_M2C_P
A3 FMC_HPC_DP1_M2C_N
A6 FMC_HPC_DP2_M2C_P
A7 FMC_HPC_DP2_M2C_N
A10 FMC_HPC_DP3_M2C_P
A11 FMC_HPC_DP3_M2C_N
A14 FMC_HPC_DP4_M2C_P
A15 FMC_HPC_DP4_M2C_N
A18 FMC_HPC_DP5_M2C_P
A19 FMC_HPC_DP5_M2C_N
A22 FMC_HPC_DP1_C2M_P
A23 FMC_HPC_DP1_C2M_N
A26 FMC_HPC_DP2_C2M_P
A27 FMC_HPC_DP2_C2M_N
A30 FMC_HPC_DP3_C2M_P
A31 FMC_HPC_DP3_C2M_N
A34 FMC_HPC_DP4_C2M_P
A35 FMC_HPC_DP4_C2M_N
A38 FMC_HPC_DP5_C2M_P
A39 FMC_HPC_DP5_C2M_N
C2 FMC_HPC_DP0_C2M_P
C3 FMC_HPC_DP0_C2M_N
C6 FMC_HPC_DP0_M2C_P
C7 FMC_HPC_DP0_M2C_N
C10 FMC_HPC_LA06_P
C11 FMC_HPC_LAO6_N
C14 FMC_HPC_LA10_P
C15 FMC_HPC_LA10_N
C18 FMC_HPC_LA14_P
C19 FMC_HPC_LA14_N
KCU105 Board User Guide
UG917 (v1.4) September 25, 2015
I/O
XCKU040
Standard J22 Pin
(U1) Pin
A/B Connections to FPGA U1
D2 B1
D1 B4
B2 B5
B1 B8
A4 B9
A3 B12
M2 B13
M1 B16
H2 B17
H1 B20
D6 B21
D5 B24
C4 B25
C3 B28
B6 B29
B5 B32
N4 B33
N3 B36
J4 B37
J3 B40
C/D Connections to FPGA U1
F6 D1
F5 D4
E4 D5
E3 D8
LVDS D13 D9
LVDS C13 D11
LVDS L8 D12
LVDS K8 D14
LVDS B10 D15
LVDS A10 D17
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Chapter 1: KCU105 Evaluation Board Features
Schematic Net Name
NC
NC
NC
NC
NC
FMC_HPC_DP7_M2C_P
FMC_HPC_DP7_M2C_N
FMC_HPC_DP6_M2C_P
FMC_HPC_DP6_M2C_N
FMC_HPC_GBTCLK1_M2C_P
FMC_HPC_GBTCLK1_M2C_N
NC
NC
NC
NC
FMC_HPC_DP7_C2M_P
FMC_HPC_DP7_C2M_N
FMC_HPC_DP6_C2M_P
FMC_HPC_DP6_C2M_N
NC
(2)
VADJ_1V8_PGOOD
FMC_HPC_GBTCLK0_M2C_P
FMC_HPC_GBTCLK0_M2C_N
FMC_HPC_LA01_CC_P
FMC_HPC_LA01_CC_N
FMC_HPC_LA05_P
FMC_HPC_LA05_N
FMC_HPC_LA09_P
FMC_HPC_LA09_N
FMC_HPC_LA_13_P
XCKU040
I/O Standard
(U1) Pin
F2
F1
K2
K1
(1)
LVDS H6
(1)
LVDS H5
G4
G3
L4
L3
LVCMOS18 U30.32
(1)
LVDS K6
(1)
LVDS K5
LVDS G9
LVDS F9
LVDS L13
LVDS K13
LVDS J9
LVDS H9
LVDS D9
70
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