Xilinx KCU105 User Manual page 72

Table 1-23: FMC HPC J22 Connections to XCKU040 Device U1 (Cont'd)
J22
Schematic Net Name
Pin
E25 NC
E27 NC
E28 NC
E30 NC
E31 NC
E33 NC
E34 NC
E36 NC
E37 NC
E39 VADJ_1V8
G2 FMC_HPC_CLK1_M2C_P
G3 FMC_HPC_CLK1_M2C_N
G6 FMC_HPC_LA00_CC_P
G7 FMC_HPC_LA00_CC_N
G9 FPC_HPC_LA03_P
G10 FPC_HPC_LA03_N
G12 FMC_HPC_LA08_P
G13 FMC_HPC_LA08_N
G15 FMC_HPC_LA12_P
G16 FMC_HPC_LA12_N
G18 FMC_HPC_LA16_P
G19 FMC_HPC_LA16_N
G21 FMC_HPC_LA20_P
G22 FMC_HPC_LA20_N
G24 FMC_HPC_LA22_P
G25 FMC_HPC_LA22_N
G27 FMC_HPC_LA25_P
G28 FMC_HPC_LA25_N
G30 FMC_HPC_LA29_P
G31 FMC_HPC_LA29_N
G33 FMC_HPC_LA31_P
G34 FMC_HPC_LA31_N
KCU105 Board User Guide
UG917 (v1.4) September 25, 2015
I/O
XCKU040
Standard (U1) Pin J22 Pin
F25
F26
F28
F29
F31
F32
F34
F35
F37
F38
F40
G/H Connections to FPGA U1
LVDS E25 H1
LVDS D25 H2
LVDS H11 H4
LVDS G11 H5
LVDS A13 H7
LVDS A12 H8
LVDS J8 H10
LVDS H8 H11
LVDS E10 H13
LVDS D10 H14
LVDS B9 H16
LVDS A9 H17
LVDS B24 H19
LVDS A24 H20
LVDS G24 H22
LVDS F25 H23
LVDS D20 H25
LVDS D21 H26
LVDS B20 H28
LVDS A20 H29
LVDS B25 H31
LVDS A25 H32
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Chapter 1: KCU105 Evaluation Board Features
Schematic Net Name
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
VADJ_1V8
NC
(5)
FMC_HPC_PRSNT_M2C_B
FMC_HPC_CLK0_M2C_P
FMC_HPC_CLK0_M2C_N
FMC_HPC_LA02_P
FMC_HPC_LA02_N
FMC_HPC_LA04_P
FMC_HPC_LA04_N
FMC_HPC_LA07_P
FMC_HPC_LA07_N
FMC_HPC_LA11_P
FMC_HPC_LA11_N
FMC_HPC_LA15_P
FMC_HPC_LA15_N
FMC_HPC_LA19_P
FMC_HPC_LA19_N
FMC_HPC_LA21_P
FMC_HPC_LA21_N
FMC_HPC_LA24_P
FMC_HPC_LA24_N
FMC_HPC_LA28_P
FMC_HPC_LA28_N
XCKU040
I/O Standard
(U1) Pin
U26.4,
LVCMOS18
U44.17
LVDS H12
LVDS G12
LVDS K10
LVDS J10
LVDS L12
LVDS K12
LVDS F8
LVDS E8
LVDS K11
LVDS J11
LVDS D8
LVDS C8
LVDS C21
LVDS C22
LVDS F23
LVDS F24
LVDS E20
LVDS E21
LVDS B21
LVDS B22
72
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