Xilinx KCU105 User Manual page 97

A KCU105 board power cycle (power off/power on) returns the clock sources to the factory
default settings. On the UltraScale FPGA evaluation boards, the factory default for the Si570
is 156.250 MHz, and the factory default for the Si5328 is 0 Hz.
The programmable clock frequencies of the KCU105 board can be set and saved for later
restoration. The saved frequencies are maintained in the KCU105 board onboard
non-volatile I2C EEPROM. The clock menu is used to manually restore previously saved
clock frequencies.
This section includes a description of the clock menu options, presenting arbitrary sample
value entries and the system controller responses. The entry value commentary is shown in
parentheses.
KCU105 System Controller
- Clock Menu-
1. Set KCU105 Si570 User Clock Frequency
2. Set KCU105 Si5328 MGT Clock Frequency
3. Save KCU105 Clock Frequency to EEPROM
4. Restore KCU105 Clock Frequency from EEPROM
5. View KCU105 Saved Clocks in EEPROM
6. Set KCU105 Clock Restore Options
7. Read KCU105 Si570 User Clock Frequency
8. Read KCU105 Si5328 MGT Clock Frequency
0. Return to Main Menu
Select an option
Clock Menu Options
Option 1: Set KCU105 Si570 User Clock Frequency
Enter the Si570 frequency <10-810MHz>:
(enter a value between 10 and 810)
100
RFreq_Cal[0]=0x02,RFreq_Cal[1]=0xBC,RFreq_Cal[2]=0x00,RFreq_Cal[3]=0xE4,
RFreq_Cal[4]=0xED
Freq: 100.0000000000 HS_DIV=5 N1=10 DCO=5000.0 RFREQ= 0x02BC00E4ED
(The returned values include configuration setting details.)
KCU105 Board User Guide
UG917 (v1.4) September 25, 2015
www.xilinx.com
Appendix C: System Controller
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