Memory Areas - Omron trajexia CJ1W-MCH72 Operation Manual

Memory areas

3-2 Memory areas
Note
60
PLC CPU
EM
CIO
DM
HR
WR
The PLC CPU uses the following memory areas for data exchange with the
CJ1W-MCH72:
• EM (Expanded Memory)
• CIO (Common I/O memory)
• DM (Data Memory)
• WR memory
• HR memory
The CJ1W-MCH72 uses the following memory areas to exchange data with
the PLC CPU:
• VR memory
• IN array (for digital inputs)
• OP array (for digital outputs)
• AIN array (for analogue inputs)
• AOUT array (for analogue outputs)
• Axis Status array (see section 3-3-2-1)
The mapping of memory areas for cyclic data exchange in the PLC CPU to
memory areas in the CJ1W-MCH72 can be freely configured. This can be
done in the PLC program or in the CJ1W-MCH72. It is recommended to
configure the memory mapping either in the startup program of the PLC or in
the startup program of the CJ1W-MCH72.
The memory mapping is not stored permanently and will be lost after a restart
of the CJ1W-MCH72 or a power cycle of the PLC system.
It is possible to configure the mapping of memory areas both in the PLC
program and in the CJ1W-MCH72. This is not practical, because the last
configuration overwrites the first.
Data exchange with the Table memory of the CJ1W-MCH72 is not possible. However,
with the FINS Write command you can write the Table memory of the CJ1W-MCH72.
CJ1W-MCH72
VR IN
OP
AIN
AOUT
Data exchange memory areas
Section 3-2
Digital and analogue
inputs and outputs