Panasonic JB-3300 Technical Manual page 197

GRAPHIC
CHBO to 7
ME \ vatain) X
paTain) MMR) pata in+2) X
vata in+2) QR
'odd Memory
ist,2nd Data Latch
| Output
rN
—_/
fEven,Odd Memory x
Data Mix Buffer
| / \ L
—<
sp DATA(n+1)
>
<p DATA (n+3)
)}——
<,; DATA (n+2) »— Ez
DATA(n)
Output
ATBO to 7 ER ata) 6 X oan 1), MR ata in+2)pX vata in+3) >
CLK1
\
=
. N\
LCHGO to 7 Xv DATA (n) XK DATA (n +t) KX pata tn+2)
Figure 5-52 Graphic Data Mix, Data Latch Timing Chart