Panasonic JB-3300 Technical Manual page 177

(g) WAIT circuit
accessed.
Figure 5-32 shows the WAIT operation timing.
(4-4C) XMEMRW
(4-36) *#VRAMSEL
(3F) ¥CMDSEL
(4-3G)*CRTCCS
(1-4H) %X 1OW
(6-9F) CPUCAS
tS!
3 2 7p2 RAMWAIT (6-1D)
LSO4
| 12 802 :
1)790%scrtwait (1-288)(1-18)
LSOO
2 6 LSII
a7o* af->\
179) (10 WAIT)
3
fre>
LSO4
+5V
+ 4bs
L802 215 She (WAIT INH)
=|6
Qr——
ig bS32 £
13} 6D
| io, LS74
SO2 21s ,,2
(6-3F) XCLK1 —= 4 we?
(6-3C) CRTADR 76) T 6C 3
RQ ? 5 XWRTE (% 1G)
LSOO
13
a | 3
2 CRTC -E (¥1E)
(I1-4H) XXIOR
Figure 5-32 WAIT Circuit
(1) Wait during VRAM access
a)
b)
c)
dq)
Then, WAIT INH goes LOW and the RAM WAIT circuit is enabled.
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