Panasonic JB-3300 Technical Manual page 183

Table of Contents

Advertisement

e)
*REF ADR ..... LOW when VRAM is refreshed.
Enables refresh
RFA address output to the VRAM address.
CLK1
CLK2
\
CLK3
jl
LCMAO
|
i
*CRTSYNC
\
|
L|
me
ADV CRT
__|
Jiser
|
CRT ADR
RAM WAIT
°
Le
*CPU ADR
-—
*REF ADR
VRAM Address
Figure 5-39
VRAM Access Timing Chart
II - 63

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents