Panasonic JB-3300 Technical Manual page 187

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VRAM address control circuit
CPU RAS Address
XAB2 to 5
VRAM
Address
CPU CAS Address
AB1O to 12
MUX
*CPU ADR
XABG ,7
CPU RAS Address
AB8 ,9
AB13,14
XAB1
CPU CAS Address
CMA1 to 4
CRT RAS Address
CRT CAS Address
CMA9 to i1
*CRT ADR
CRT RAS Add
CMA5 to 8
ress
CMAO,12,13
RAO, 1
*CLK3
*TEXT80
GRAPHIC
*SUPER GRAPHIC
Refresh
Refresh
Address
Address
Counter
RESET
*CLK1
*REF ADR
L
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VRAM Address MPX
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TI - 67

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